Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-side short or leakage, at least one corner short or leakage, and at least one via open or resistance, where such measurements are obtained from non-contact pads associated with respective tip-to-side short, corner short, and via open test areas

Stephen Lam, Freemont, CA (US);

Dennis Ciplickas, San Jose, CA (US);

Tomasz Brozek, Morgan Hill, CA (US);

Jeremy Cheng, San Jose, CA (US);

Simone Comensoli, Darfo Boario Terme, IT;

Indranil De, Mountain View, CA (US);

Kelvin Doong, Hsinchu, TW;

Hans Eisenmann, Tutzing, DE;

Timothy Fiscus, New Galilee, PA (US);

Jonathan Haigh, Pittsburgh, PA (US);

Christopher Hess, Belmont, CA (US);

John Kibarian, Los Altos Hills, CA (US);

Sherry Lee, Monte Sereno, CA (US);

Marci Liao, Santa Clara, CA (US);

Sheng-Che Lin, Hsinchu, TW;

Hideki Matsuhashi, Santa Clara, CA (US);

Kimon Michaels, Monte Sereno, CA (US);

Conor O'Sullivan, Campbell, CA (US);

Markus Rauscher, Munich, DE;

Vyacheslav Rovner, Pittsburgh, PA (US);

Andrzej Strojwas, Pittsburgh, PA (US);

Marcin Strojwas, Pittsburgh, PA (US);

Carl Taylor, Pittsburgh, PA (US);

Rakesh Vallishayee, Dublin, CA (US);

Larg Weiland, Hollister, CA (US);

Nobuharu Yokoyama, Tokyo, JP;

PDF Solutions, Inc., Santa Clara, CA (US);