IDiyas

For the Inventor, By the Inventor

Pittsburgh, PA, United States of America

Marcin Strojwas

USPTO Granted Patents = 82

Average Co-Inventor Count = 26.0

ph-index = 8

Forward Citations = 254(Granted Patents)

Forward Citations (Not Self Cited) = 202(Oct 12, 2025)


Inventors with similar research interests:


Company Filing History:

goldMedal82 out of 203 
 
Pdf Solutions, Incorporated
 patents

Years Active: 2017-2021

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82 patents (USPTO):
1. 11107804 - IC with test structures and e-beam pads embedded within a contiguous standard cell area (2021-08-31),
2. 11081477 - IC with test structures and e-beam pads embedded within a contiguous standard cell area (2021-08-03),
3. 11081476 - IC with test structures and e-beam pads embedded within a contiguous standard cell area (2021-08-03),
4. 11075194 - IC with test structures and E-beam pads embedded within a contiguous standard cell area (2021-07-27),
5. 11018126 - IC with test structures and e-beam pads embedded within a contiguous standard cell area (2021-05-25),
6. 10978438 - IC with test structures and E-beam pads embedded within a contiguous standard cell area (2021-04-13),
7. 10854522 - Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-side short or leakage, at least one corner short or leakage, and at least one via open or resistance, where such measurements are obtained from non-contact pads associated with respective tip-to-side short, corner short, and via open test areas (2020-12-01),
8. 10777472 - IC with test structures embedded within a contiguous standard cell area (2020-09-15),
9. 10593604 - Process for making semiconductor dies, chips, and wafers using in-line measurements obtained from DOEs of NCEM-enabled fill cells (2020-03-17),
10. 10290552 - Methods for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one via-chamfer short or leakage, and at least one corner short or leakage, where such measurements are obtained from cells with respective tip-to-tip short, via-chamfer short, and corner short test areas, using a charged particle-beam inspector with beam deflection to account for motion of the stage (2019-05-14),
11. 10269786 - Integrated circuit containing first and second DOEs of standard Cell Compatible, NCEM-enabled Fill Cells, with the first DOE including tip-to-side short configured fill cells, and the second DOE including corner short configured fill cells (2019-04-23),
12. 10211112 - Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one tip-to-side short or leakage, and at least one side-to-side short or leakage, where such measurements are obtained from non-contact pads associated with respective tip-to-tip short, tip-to-side short, and side-to-side short test areas (2019-02-19),
13. 10211111 - Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one tip-to-side short or leakage, and at least one corner short or leakage, where such measurements are obtained from non-contact pads associated with respective tip-to-tip short, tip-to-side sort, and corner short test areas (2019-02-19),
14. 10199294 - Method for processing a semiconductor wafer using non-contact electrical measurements indicative of a least one side-to-side short or leakage, at least one via-chamfer short or leakage, and at least one corner short or leakage, where such measurements are obtained from cells with respective side-to-side short, via-chamfer short, and corner short test areas, using a charged particle-beam inspector with beam deflection to account for motion of the stage (2019-02-05),
15. 10199293 - Method for processing a semiconductor water using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one side-to-side short or leakage, and at least one chamfer short or leakage, where such measurements are obtained from non-contact pads associated with respective tip-to-tip short, side to side short, and chamfer short test areas (2019-02-05),

Title: The Innovative Journey of Marcin Strojwas: Pioneering the Future of Integrated Circuits

Introduction:

Meet Marcin Strojwas, a prolific inventor based in Pittsburgh, PA, who has made significant contributions to the world of integrated circuits. With an impressive portfolio of 82 patents, Strojwas continues to push boundaries and drive innovation in the tech industry.

Latest Patents:

Strojwas' latest patents showcase his expertise in developing cutting-edge technologies. One notable invention is an IC that features test structures and e-beam pads embedded within a contiguous standard cell area. This innovation is designed to be compatible with advanced manufacturing processes, highlighting Strojwas' forward-thinking approach to IC design.

Career Highlights:

Currently working at Pdf Solutions, Incorporated, Strojwas plays a key role in shaping the future of the semiconductor industry. His years of experience and deep understanding of integrated circuitry have positioned him as a thought leader in the field. Strojwas' dedication to innovation is reflected in the numerous patents he has received throughout his career.

Collaborations:

In his professional journey, Strojwas has collaborated with esteemed colleagues such as Stephen Lam and Dennis Ciplickas. Together, they have worked on projects that have revolutionized the way integrated circuits are designed and manufactured. Strojwas' ability to collaborate and synergize with fellow experts underscores his commitment to driving technological advancements.

Conclusion:

Marcin Strojwas' unwavering passion for innovation and his relentless pursuit of excellence have solidified his position as a trailblazer in the realm of integrated circuits. With a formidable patent portfolio and a proven track record of success, Strojwas continues to shape the future of technology and inspire the next generation of inventors.

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