IDiyas

For the Inventor, By the Inventor

Dublin, CA, United States of America

Rakesh Vallishayee

USPTO Granted Patents = 86

Average Co-Inventor Count = 23.1

ph-index = 9

Forward Citations = 446(Granted Patents)

DiyaCoin DiyaCoin = 0.06 


Inventors with similar research interests:


Location History:

  • San Jose, CA (US) (2008 - 2020)
  • Dublin, CA (US) (2017 - 2021)

Company Filing History:

goldMedal86 out of 203 
 
Pdf Solutions, Incorporated
 patents

Years Active: 2008-2021

where 'Filed Patents' based on already Granted Patents

86 patents (USPTO):
1. 11107804 - IC with test structures and e-beam pads embedded within a contiguous standard cell area (2021-08-31),
2. 11081477 - IC with test structures and e-beam pads embedded within a contiguous standard cell area (2021-08-03),
3. 11081476 - IC with test structures and e-beam pads embedded within a contiguous standard cell area (2021-08-03),
4. 11075194 - IC with test structures and E-beam pads embedded within a contiguous standard cell area (2021-07-27),
5. 11018126 - IC with test structures and e-beam pads embedded within a contiguous standard cell area (2021-05-25),
6. 10978438 - IC with test structures and E-beam pads embedded within a contiguous standard cell area (2021-04-13),
7. 10854522 - Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-side short or leakage, at least one corner short or leakage, and at least one via open or resistance, where such measurements are obtained from non-contact pads associated with respective tip-to-side short, corner short, and via open test areas (2020-12-01),
8. 10777472 - IC with test structures embedded within a contiguous standard cell area (2020-09-15),
9. 10643735 - Passive array test structure for cross-point memory characterization (2020-05-05),
10. 10593604 - Process for making semiconductor dies, chips, and wafers using in-line measurements obtained from DOEs of NCEM-enabled fill cells (2020-03-17),
11. 10290552 - Methods for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one via-chamfer short or leakage, and at least one corner short or leakage, where such measurements are obtained from cells with respective tip-to-tip short, via-chamfer short, and corner short test areas, using a charged particle-beam inspector with beam deflection to account for motion of the stage (2019-05-14),
12. 10269786 - Integrated circuit containing first and second DOEs of standard Cell Compatible, NCEM-enabled Fill Cells, with the first DOE including tip-to-side short configured fill cells, and the second DOE including corner short configured fill cells (2019-04-23),
13. 10211112 - Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one tip-to-side short or leakage, and at least one side-to-side short or leakage, where such measurements are obtained from non-contact pads associated with respective tip-to-tip short, tip-to-side short, and side-to-side short test areas (2019-02-19),
14. 10211111 - Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one tip-to-side short or leakage, and at least one corner short or leakage, where such measurements are obtained from non-contact pads associated with respective tip-to-tip short, tip-to-side sort, and corner short test areas (2019-02-19),
15. 10199294 - Method for processing a semiconductor wafer using non-contact electrical measurements indicative of a least one side-to-side short or leakage, at least one via-chamfer short or leakage, and at least one corner short or leakage, where such measurements are obtained from cells with respective side-to-side short, via-chamfer short, and corner short test areas, using a charged particle-beam inspector with beam deflection to account for motion of the stage (2019-02-05),

Title: Rakesh Vallishayee: Pioneering Innovator in Advanced IC Technologies

Introduction:

Rakesh Vallishayee, a distinguished inventor and resident of Dublin, CA, is a renowned name in the field of integrated circuit (IC) technology. With an impressive portfolio of 86 patents, Rakesh has revolutionized the industry with his groundbreaking inventions. This article will delve into his latest patents, career highlights, and notable collaborations that have cemented his position as a leading figure in the field.

Latest Patents:

One of Rakesh Vallishayee's latest patents is an IC with test structures and e-beam pads embedded within a contiguous standard cell area. This innovative IC comprises a 4x3 e-beam pad that seamlessly integrates into advanced manufacturing processes and features an associated e-beam testable structure. This breakthrough paves the way for enhanced IC design and testing methodologies, ensuring higher efficiency and reliability in production.

Career Highlights:

Rakesh Vallishayee's career has been marked by remarkable achievements in the realm of IC technology. Over the course of his journey, he has been a valuable asset to Pdf Solutions, Incorporated— an esteemed company specializing in semiconductor solutions. With his extensive knowledge and expertise, Rakesh has consistently pushed the boundaries of innovation, contributing significantly to the company's success.

Collaborations:

Throughout his career, Rakesh Vallishayee has collaborated with several noteworthy individuals, fostering an environment of collaboration and creativity. Notable among his coworkers are Christopher Hess and Dennis Ciplickas, both esteemed professionals in the field. Together, they have embarked on numerous projects, combining their expertise to bring forth cutting-edge advancements in IC technologies. Their collective efforts have propelled the industry towards new horizons of possibility.

Conclusion:

Rakesh Vallishayee's impressive repertoire of patents and his contributions to the field of IC technology make him a true visionary. His novel ideas and relentless pursuit of excellence continue to shape the future of advanced manufacturing processes and IC design. Through his collaborations and association with Pdf Solutions, Incorporated, Rakesh has demonstrated his commitment to pushing the boundaries of innovation. As an inventor, he has undoubtedly left an indelible mark in the industry and continues to inspire future generations of innovators.

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