Singapore, Singapore

Liang Choo Hsia

This inventor holds 66 USPTO granted patents and 2 published patent applications, primarily in Semiconductor Fabrication (CPC class H01L). Top assignees: Chartered Semiconductor Manufacturing Ltd (Corporation), Globalfoundries Singapore Pte. Ltd.. Active years: 2003-2016.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Liang Choo Hsia. Retrieved from https://idiyas.com/inventor/liang-choo-hsia

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 66 

% Patents Active = 48.5

Average Co-Inventor Count = 4.6

ph-index = 11

Forward Citations = 511(Granted Patents)

Forward Citations (Not Self Cited) = 502(Dec 10, 2025)


Inventors with similar research interests:


Company Filing History:


Years Active: 2003-2016

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Areas of Expertise:
Interconnect Reliability
Thermal Management
Dielectric Processes
Strained Channel Transistor
Integrated Circuits
Optical Proximity Correction
High-k Dielectric
Shallow Trench Isolation
Copper Interconnects
Epitaxial Channel
Defect Monitoring
Phase Lithography
66 patents (USPTO):Explore Patents

Title: **Liang Choo Hsia: A Pioneer in Semiconductor Innovations**

Introduction

Liang Choo Hsia is a prominent inventor based in Singapore, known for his extensive contributions to the field of semiconductor technology. With an impressive portfolio of 66 patents, Hsia has made significant strides in enhancing the reliability and efficiency of interconnect structures in semiconductor devices.

Latest Patents

Hsia's recent patents showcase innovative methods for optimizing slot designs in wide metal lines to mitigate stress. One such patent involves a detailed method and structure for slots in wide lines, aimed at relieving stress between the wide line and the via plug. This design includes an interconnect structure featuring a wide line with a strategically spaced slot that enhances reliability. Another noteworthy patent presents a reliable interconnect for semiconductor devices by outlining a method that begins with a substrate prepared with a dielectric layer. By forming a sacrificial and hard mask layer, and subsequently filling interconnect openings with conductive material, Hsia ensures that the top surface of the conductive material remains planar with the sacrificial layer, which protects during processing.

Career Highlights

Hsia has worked with notable corporations in the semiconductor industry, including Chartered Semiconductor Manufacturing Ltd. and Globalfoundries Singapore Pte. Ltd. His expertise has significantly influenced the development of cutting-edge technologies within these organizations.

Collaborations

Working alongside colleagues such as Mei Sheng Zhou and Fan Zhang, Hsia has fostered an environment of innovation and collaboration, contributing to advancements in semiconductor research and development.

Conclusion

Liang Choo Hsia's relentless pursuit of innovation in the semiconductor field, evidenced by his numerous patents and significant corporate collaborations, continues to impact the industry positively. His work exemplifies the vital role of inventors in driving technological advancements and shaping the future of semiconductor devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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