The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 09, 2015

Filed:

Dec. 02, 2013
Applicant:

Globalfoundries Singapore Pte. Ltd., Singapore, SG;

Inventors:

Fan Zhang, Singapore, SG;

Xiaomei Bu, Singapore, SG;

Jane Hui, Singapore, SG;

Tae Jong Lee, SeongNam, KR;

Liang Choo Hsia, Singapore, SG;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/52 (2006.01); H01L 23/522 (2006.01); H01L 21/311 (2006.01); H01L 21/321 (2006.01); H01L 21/768 (2006.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5226 (2013.01); H01L 21/31127 (2013.01); H01L 21/31144 (2013.01); H01L 21/3212 (2013.01); H01L 21/76822 (2013.01); H01L 21/7684 (2013.01); H01L 21/76885 (2013.01); H01L 23/53238 (2013.01);
Abstract

A method for forming a semiconductor device is presented. A substrate prepared with a dielectric layer formed thereon is provided. A sacrificial and a hard mask layer are formed on the dielectric layer. The dielectric, sacrificial and hard mask layers are patterned to form an interconnect opening. The interconnect opening is filled with a conductive material to form an interconnect. The conductive material is processed to produce a top surface of the conductive material that is substantially planar with a top surface of the sacrificial layer. The sacrificial layer is removed. The sacrificial layer protects the dielectric layer during processing of the conductive material.


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