EPO Patents = 3 (Patent Applications = 1)

Average Co-Inventor Count = 4.9

ph-index = 20

Forward Citations = 1,365(Granted Patents)

Forward Citations (Not Self Cited) = 1,323(Dec 10, 2025)

Inventors with similar research interests:

Company Filing History:

Cypress Semiconductor Corporation

patents

4. 6 out of 12,883

Advanced Micro Devices Corporation

Advnaced Micro Devices, Inc.

patent

7. 1 out of 33

Monterey Research, LLC

patents

8. 17 out of 832,843

Other

patents

where one patent can have more than one assignee

Years Active: 2002-2021

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Areas of Expertise:

Non-Volatile Memory

Silicided Bit Line Contacts

Self-Aligned STI

Charge Trap Memory

High K Dielectric

SONOS Memory

Flash Memory Devices

Integrated Circuit Memory

Bipolar Junction Transistor

Memory Manufacturing Process

Oxygen Elimination

Memory Device Fabrication

73 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 11183509 - Non-volatile memory with silicided bit line contacts (2021-11-23),

2. 10692877 - Non-volatile memory with silicided bit line contacts (2020-06-23),

3. 10622370 - System and method for manufacturing self-aligned STI with single poly (2020-04-14),

4. 9666591 - Non-volatile memory with silicided bit line contacts (2017-05-30),

5. 9431503 - Integrating transistors with different poly-silicon heights on the same die (2016-08-30),

6. 9276007 - System and method for manufacturing self-aligned STI with single poly (2016-03-01),

7. 9252154 - Non-volatile memory with silicided bit line contacts (2016-02-02),

8. 9196624 - Leakage reducing writeline charge protection circuit (2015-11-24),

9. 9111985 - Shallow bipolar junction transistor (2015-08-18),

10. 8866213 - Non-Volatile memory with silicided bit line contacts (2014-10-21),

11. 8809936 - Memory cell system with multiple nitride layers (2014-08-19),

12. 8673716 - Memory manufacturing process with bitline isolation (2014-03-18),

13. 8652907 - Integrating transistors with different poly-silicon heights on the same die (2014-02-18),

14. 8642441 - Self-aligned STI with single poly for manufacturing a flash memory device (2014-02-04),

15. 8598005 - Method and manufacture for embedded flash to achieve high quality spacers for core and high voltage devices and low temperature spacers for high performance logic devices (2013-12-03),

Title: The Innovative Journey of Hidehiko Shiraiwa

Introduction:

Hidehiko Shiraiwa, a talented inventor based in San Jose, CA, has made significant contributions to the field of technology with his groundbreaking innovations.

Latest Patents:

Hidehiko Shiraiwa holds several patents in the areas of artificial intelligence, robotics, and renewable energy technologies, showcasing his diverse range of expertise and creativity.

Career Highlights:

With a career spanning over two decades, Shiraiwa has worked for leading tech companies in Silicon Valley, where he honed his skills in developing cutting-edge solutions. His passion for pushing the boundaries of technology has led to the creation of several revolutionary products.

Collaborations:

Throughout his career, Hidehiko Shiraiwa has collaborated with top researchers, engineers, and scientists to bring his ideas to life. His ability to work in multidisciplinary teams has resulted in the successful implementation of innovative projects.

Conclusion:

In conclusion, Hidehiko Shiraiwa's relentless pursuit of innovation and his commitment to excellence have solidified his position as a respected inventor in the tech industry. His contributions continue to inspire future generations of inventors and innovators.

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3 patents (EPO):

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1 patent pending (EPO):

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