The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 03, 2013
Filed:
Jul. 18, 2011
Simon Siu-sing Chan, Saratoga, CA (US);
Hidehiko Shiraiwa, San Jose, CA (US);
Chuan Lin, Cupertino, CA (US);
Lei Xue, Milpitas, CA (US);
Kenichi Ohtsuka, Sunnyvale, CA (US);
Angela Tai Hui, Fremont, CA (US);
Simon Siu-Sing Chan, Saratoga, CA (US);
Hidehiko Shiraiwa, San Jose, CA (US);
Chuan Lin, Cupertino, CA (US);
Lei Xue, Milpitas, CA (US);
Kenichi Ohtsuka, Sunnyvale, CA (US);
Angela Tai Hui, Fremont, CA (US);
Spansion LLC, Sunnyvale, CA (US);
Abstract
A method and manufacture for memory device fabrication is provided. Spacer formation and junction formation is performed on both: a memory cell region in a core section of a memory device in fabrication, and a high-voltage device region in a periphery section of the memory device in fabrication. The spacer formation and junction formation on both the memory cell region and the high-voltage device region includes performing a rapid thermal anneal. After performing the spacer formation and junction formation on both the memory cell region and the high-voltage device region, spacer formation and junction formation is performed on a low-voltage device region in the periphery section.