The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 30, 2016
Filed:
Jan. 07, 2014
Cypress Semiconductor Corporation, San Jose, CA (US);
Chuan Lin, Cupertino, CA (US);
Hidehiko Shiraiwa, San Jose, CA (US);
Bradley Marc Davis, Mountain View, CA (US);
Lei Xue, Milpitas, CA (US);
Simon S. Chan, Saratoga, CA (US);
Kenichi Ohtsuka, Sunnyvale, CA (US);
Angela T. Hui, Fremont, CA (US);
Scott Allan Bell, San Jose, CA (US);
CYPRESS SEMICONDUCTOR CORPORATION, San Jose, CA (US);
Abstract
An integrated circuit comprises a first poly-silicon region including a first poly-silicon layer, a second poly-silicon layer disposed over the first poly-silicon layer, a first poly-silicon finger associated with the first poly-silicon layer, and a second poly-silicon finger associated with the second poly-silicon layer. The first poly-silicon finger and the second poly-silicon finger are oriented in a substantially orthogonal manner relative to each other. The integrated circuit comprises a second poly-silicon gate region including the first poly-silicon layer. The first polysilicon gate region and the second polysilicon gate region each have different poly-silicon gate structures.