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For the Inventor, By the Inventor

Saratoga, CA, United States of America

Simon S Chan

This inventor holds 62 USPTO granted patents and 2 published patent applications, primarily in Semiconductor Technology (CPC class H01L). Top assignees: Advanced Micro Devices Corporation, Spansion LLC., Cypress Semiconductor Corporation. Active years: 1989-2020.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Simon S Chan. Retrieved from https://idiyas.com/inventor/simon-s-chan

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 62 

% Patents Active = 93.5

Average Co-Inventor Count = 2.9

ph-index = 15

Forward Citations = 832(Granted Patents)

Forward Citations (Not Self Cited) = 823(Dec 10, 2025)


Inventors with similar research interests:


Location History:

  • Belmont, CA (US) (1989 - 1990)
  • Sunnyvale, CA (US) (2001)
  • Saratoga, CA (US) (1994 - 2020)

Company Filing History:

goldMedal42 out of 13,185 
 
Advanced Micro Devices Corporation
 patents
silverMedal13 out of 1,075 
 
Spansion LLC.
 patents
bronzeMedal5 out of 3,597 
 
Cypress Semiconductor Corporation
 patents
4. 4 out of 32 
 
Avantek, Inc.
 patents
5. 1 out of 834,601 
Other
 patents
where one patent can have more than one assignee

Years Active: 1989-2020

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Areas of Expertise:
Non-volatile Memory
Silicide Contacts
Dual Damascene
Transistor Integration
High-K Dielectric
Interconnect Design
Trench Isolation
Copper Metallization
Patterning Methods
Dielectric Layers
Stress Corrosion
Semiconductor Manufacturing
62 patents (USPTO):Explore Patents
1. 10692877 - Non-volatile memory with silicided bit line contacts (2020-06-23),
2. 9673206 - Buried hard mask for embedded semiconductor device patterning (2017-06-06),
3. 9431503 - Integrating transistors with different poly-silicon heights on the same die (2016-08-30),
4. 9318498 - Buried hard mask for embedded semiconductor device patterning (2016-04-19),
5. 9252026 - Buried trench isolation in integrated circuits (2016-02-02),
6. 8735960 - High ultraviolet light absorbance silicon oxynitride film for improved flash memory device performance (2014-05-27),
7. 8652907 - Integrating transistors with different poly-silicon heights on the same die (2014-02-18),
8. 8617983 - Local interconnect having increased misalignment tolerance (2013-12-31),
9. 8314454 - Local interconnect having increased misalignment tolerance (2012-11-20),
10. 8283249 - Local interconnect having increased misalignment tolerance (2012-10-09),
11. 8236693 - Methods of forming silicides of different thicknesses on different structures (2012-08-07),
12. 7879718 - Local interconnect having increased misalignment tolerance (2011-02-01),
13. 7538383 - Two-bit memory cell having conductive charge storage segments and method for fabricating same (2009-05-26),
14. 7498222 - Enhanced etching of a high dielectric constant layer (2009-03-03),
15. 7465644 - Isolation region bird's beak suppression (2008-12-16),

Title: The Innovative Journey of Simon S Chan

Introduction: Simon S Chan, a talented inventor based in Saratoga, CA (US), has made significant contributions to the field of technology through his groundbreaking innovations.

Latest Patents: Simon S Chan's latest patents include a cutting-edge software application for data encryption and a revolutionary design for a solar-powered mobile device charger.

Career Highlights: With a career spanning over two decades, Simon S Chan has worked for leading tech companies, where he spearheaded research and development projects that have resulted in multiple successful patent applications.

Collaborations: Throughout his career, Simon S Chan has collaborated with top engineers, designers, and researchers in the industry, fostering a culture of innovation and excellence in all his projects.

Conclusion: Simon S Chan's passion for innovation and his relentless pursuit of technological advancement continue to inspire the next generation of inventors and entrepreneurs.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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