The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 18, 2015
Filed:
Jan. 11, 2007
Applicants:
Alok Nandini Roy, San Jose, CA (US);
Gulzar Kathawala, Santa Clara, CA (US);
Zubin Patel, San Jose, CA (US);
Hidehiko Shiraiwa, San Jose, CA (US);
Inventors:
Alok Nandini Roy, San Jose, CA (US);
Gulzar Kathawala, Santa Clara, CA (US);
Zubin Patel, San Jose, CA (US);
Hidehiko Shiraiwa, San Jose, CA (US);
Assignee:
Cypress Semiconductor Corporation, San Jose, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/73 (2006.01); H01L 29/08 (2006.01);
U.S. Cl.
CPC ...
H01L 29/73 (2013.01); H01L 29/0804 (2013.01);
Abstract
A shallow bipolar junction transistor comprising a high voltage n+ well implanted into a semiconductor substrate. The shallow bipolar junction transistor further comprises a bit line n+ implant (BNI) above the high voltage n+ well and an oxide nitride (ONO) layer above the high voltage n+ well. A portion of the ONO layer isolates the BNI from a shallow trench isolation (STI) region.