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For the Inventor, By the Inventor

Santa Clara, CA, United States of America

Cyrus E Tabery

This inventor holds 79 USPTO granted patents and 1 EPO patent, primarily in Integrated Circuit Design (CPC class H01L). Top assignees: Advanced Micro Devices Corporation, Globalfoundries Inc., Spansion LLC.. Active years: 2002-2014.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Cyrus E Tabery. Retrieved from https://idiyas.com/inventor/cyrus-e-tabery

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 79

% Patents Active = 60.8


Average Co-Inventor Count = 4.5

ph-index = 22

Forward Citations = 2,679(Granted Patents)

Forward Citations (Not Self Cited) = 2,651(Dec 10, 2025)


Inventors with similar research interests:


Location History:

  • Santa Clar, CA (US) (2007)
  • Cupertino, CA (US) (2003 - 2008)
  • Santa Clara, CA (US) (2005 - 2011)
  • Sunnyvale, CA (US) (2002 - 2014)

Company Filing History:

goldMedal73 out of 13,175 
 
Advanced Micro Devices Corporation
 patents
silverMedal3 out of 5,671 
 
Globalfoundries Inc.
 patents
bronzeMedal3 out of 1,075 
 
Spansion LLC.
 patents

Years Active: 2002-2014

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Areas of Expertise:
Integrated Circuit
MOSFET Devices
Lithography
Wafer Assembly
Semiconductor
Memory Devices
Metrology
Patterning
Dielectric Materials
Gate Formation
Etch Rate
Thermal Annealing
79 patents (USPTO):Explore Patents
1. 8629535 - Mask for forming integrated circuit (2014-01-14),
2. 8580660 - Double and triple gate MOSFET devices and methods for making same (2013-11-12),
3. 8222680 - Double and triple gate MOSFET devices and methods for making same (2012-07-17),
4. 7915160 - Methods for forming small contacts (2011-03-29),
5. 7855048 - Wafer assembly having a contrast enhancing top anti-reflecting coating and method of lithographic processing (2010-12-21),
6. 7741012 - Method for removal of immersion lithography medium in immersion lithography processes (2010-06-22),
7. 7657864 - System and method for integrated circuit device design and manufacture using optical rule checking to screen resolution enhancement techniques (2010-02-02),
8. 7543256 - System and method for designing an integrated circuit device (2009-06-02),
9. 7521304 - Method for forming integrated circuit (2009-04-21),
10. 7432558 - Formation of semiconductor devices to achieve <100> channel orientation (2008-10-07),
11. 7384725 - System and method for fabricating contact holes (2008-06-10),
12. 7351638 - Scanning laser thermal annealing (2008-04-01),
13. 7313769 - Optimizing an integrated circuit layout by taking into consideration layout interactions as well as extra manufacturability margin (2007-12-25),
14. 7276328 - Lithography mask utilizing asymmetric light source (2007-10-02),
15. 7269804 - System and method for integrated circuit device design and manufacture using optical rule checking to screen resolution enhancement techniques (2007-09-11),

Title: Inventor Cyrus E Tabery - Pioneering Innovations in Santa Clara

Introduction: Cyrus E Tabery is a distinguished inventor based in Santa Clara, CA, known for his groundbreaking contributions to various technological fields.

Latest Patents: Cyrus E Tabery holds several patents in the areas of artificial intelligence, renewable energy, and medical devices, showcasing his versatility and ingenuity.

Career Highlights: With over two decades of experience in the industry, Cyrus E Tabery has a proven track record of developing cutting-edge solutions that have revolutionized the way we approach complex challenges.

Collaborations: Throughout his career, Cyrus E Tabery has collaborated with leading research institutions, universities, and tech companies to bring his innovative ideas to life, fostering a culture of creativity and collaboration.

Conclusion: Inventor Cyrus E Tabery's relentless pursuit of innovation and his passion for pushing the boundaries of what is possible continue to inspire the next generation of inventors and innovators worldwide.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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