The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 21, 2010

Filed:

May. 04, 2004
Applicants:

Cyrus E. Tabery, Santa Clara, CA (US);

Bruno M. Lafontaine, Pleasanton, CA (US);

Adam R. Pawloski, San Jose, CA (US);

Jongwook Kye, Pleasanton, CA (US);

Inventors:

Cyrus E. Tabery, Santa Clara, CA (US);

Bruno M. LaFontaine, Pleasanton, CA (US);

Adam R. Pawloski, San Jose, CA (US);

Jongwook Kye, Pleasanton, CA (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/01 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of fabricating a semiconductor device using lithography. The method can include providing a wafer assembly having a layer to be processed disposed under a photo resist layer and illuminating the wafer assembly with an exposure dose transmitted through a birefringent material disposed between a final optical element of an imaging subsystem used to transmit the exposure dose and the photo resist layer. Also disclosed is a wafer assembly from which at least one semiconductor device can be fabricated. The wafer assembly can include a layer to be processed, a photo resist layer disposed over the layer to be processed and a contrast enhancing, birefringent top anti-reflecting coating (TARC).


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