Yannick Le Tiec

This inventor holds 23 USPTO granted patents and 2 EPO patents. Top assignees: Commissariat a L'energie Atomique Et Aux Energies Alternatives, International Business Machines Corporation, Stmicroelectronics Gmbh. Active years: 2013-2017.

USPTO Granted Patents = 23

% Patents Active = 87.0

EPO Patents = 2 (Patent Applications = 12)

Average Co-Inventor Count = 4.4

ph-index = 4

Forward Citations = 38(Granted Patents)

Company Filing History:

21 out of 8,807

Commissariat a L'energie Atomique Et Aux Energies Alternatives

patents

6 out of 166,209

International Business Machines Corporation

patents

6 out of 2,891

Stmicroelectronics Gmbh

where one patent can have more than one assignee

Years Active: 2013-2017

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23 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 9673329 - Method for manufacturing a fin MOS transistor (2017-06-06),

2. 9601511 - Low leakage dual STI integrated circuit including FDSOI transistors (2017-03-21),

3. 9570465 - Dual STI integrated circuit including FDSOI transistors and method for manufacturing the same (2017-02-14),

4. 9437474 - Method for fabricating microelectronic devices with isolation trenches partially formed under active regions (2016-09-06),

5. 9373507 - Defective P-N junction for backgated fully depleted silicon on insulator mosfet (2016-06-21),

6. 9337350 - Transistor with reduced parasitic capacitance and access resistance of the source and drain, and method of fabrication of the same (2016-05-10),

7. 9293474 - Dual channel hybrid semiconductor-on-insulator semiconductor devices (2016-03-22),

8. 9236478 - Method for manufacturing a fin MOS transistor (2016-01-12),

9. 9231062 - Method for treating the surface of a silicon substrate (2016-01-05),

10. 9214515 - Method for making a semiconductor structure with a buried ground plane (2015-12-15),

11. 9105691 - Contact isolation scheme for thin buried oxide substrate devices (2015-08-11),

12. 9076732 - Method to prepare semi-conductor device comprising a selective etching of a silicium—germanium layer (2015-07-07),

13. 9070709 - Method for producing a field effect transistor with implantation through the spacers (2015-06-30),

14. 9059041 - Dual channel hybrid semiconductor-on-insulator semiconductor devices (2015-06-16),

15. 8994142 - Field effect transistor with offset counter-electrode contact (2015-03-31),

Title: The Innovative Journey of Yannick Le Tiec

Introduction: Yannick Le Tiec, a talented inventor hailing from Crolles, France, has made significant contributions to the field of technology with his groundbreaking inventions.

Latest Patents: Yannick Le Tiec holds several patents in the areas of semiconductor technology and telecommunications, showcasing his expertise and innovative mindset.

Career Highlights: Throughout his career, Yannick Le Tiec has worked with leading tech companies, where he has played a key role in developing cutting-edge technologies that have revolutionized the industry.

Collaborations: Yannick Le Tiec has collaborated with top researchers and engineers in the field, fostering a culture of innovation and pushing the boundaries of what is possible in the world of technology.

Conclusion: Yannick Le Tiec's passion for innovation and his relentless pursuit of excellence have solidified his reputation as a visionary inventor, shaping the future of technology with his remarkable contributions.