The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 06, 2016

Filed:

Sep. 05, 2012
Applicants:

Laurent Grenouillet, Rives sur Fure, FR;

Yannick Le Tiec, Crolles, FR;

Nicolas Loubet, Guilderland, NY (US);

Maud Vinet, Rives sur Fure, FR;

Romain Wacquez, Marseilles, FR;

Inventors:

Laurent Grenouillet, Rives sur Fure, FR;

Yannick Le Tiec, Crolles, FR;

Nicolas Loubet, Guilderland, NY (US);

Maud Vinet, Rives sur Fure, FR;

Romain Wacquez, Marseilles, FR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/76 (2006.01); H01L 21/762 (2006.01); H01L 21/84 (2006.01); H01L 21/3065 (2006.01); H01L 21/308 (2006.01); H01L 21/265 (2006.01); H01L 21/306 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76283 (2013.01); H01L 21/26506 (2013.01); H01L 21/26586 (2013.01); H01L 21/3065 (2013.01); H01L 21/3086 (2013.01); H01L 21/30604 (2013.01); H01L 21/76224 (2013.01); H01L 21/76232 (2013.01); H01L 21/84 (2013.01);
Abstract

A method of producing a microelectronic device in a substrate comprising a first semiconductor layer, a dielectric layer and a second semiconductor layer, comprising the following steps: etching a trench through the first semiconductor layer, the dielectric layer and a part of the thickness of the second semiconductor layer, thus defining, in the first semiconductor layer, one active region of the microelectronic device, ionic implantation in one or more side walls of the trench, at the level of the second semiconductor layer, modifying the crystallographic properties and/or the chemical properties of the implanted semiconductor, etching of the implanted semiconductor such that at least a part of the trench extends under a part of the active region, —filling of the trench with a dielectric material, forming an isolation trench surrounding the active region and comprising portions extending under a part of the active region.


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