logo

For the Inventor, By the Inventor

Rives, France

Laurent Grenouillet

This inventor holds 61 USPTO granted patents and 15 published patent applications and 30 EPO patents, primarily in Memory Technology (CPC class H01L). Top assignees: Commissariat a L'energie Atomique Et Aux Energies Alternatives, Stmicroelectronics Gmbh, International Business Machines Corporation. Active years: 2010-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Laurent Grenouillet. Retrieved from https://idiyas.com/inventor/laurent-grenouillet

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 61 

% Patents Active = 88.5

 

Average Co-Inventor Count = 3.4

ph-index = 6

Forward Citations = 154(Granted Patents)

Forward Citations (Not Self Cited) = 145(Dec 10, 2025)


Inventors with similar research interests:


Location History:

  • Albany, NY (US) (2016 - 2017)
  • Rives sur Fure, FR (2016 - 2017)
  • Claix, FR (2017 - 2021)
  • Rives, FR (2010 - 2022)
  • Grenoble, FR (2016 - 2024)

Company Filing History:

goldMedal59 out of 8,819 
 
Commissariat a L'energie Atomique Et Aux Energies Alternatives
 patents
silverMedal9 out of 2,891 
 
Stmicroelectronics Gmbh
 patents
bronzeMedal6 out of 166,325 
 
International Business Machines Corporation
 patents
4. 6 out of 2,426 
 
STMicroelectronics
 patents
5. 3 out of 5,671 
 
Globalfoundries Inc.
 patents
6. 3 out of 778 
 
Stmicroelectronics (Crolles 2) Sas
 patents
7. 1 out of 237 
 
Université´ D'aix-Marseille
 patents
where one patent can have more than one assignee

Years Active: 2010-2026

Loading Chart...
Loading Chart...
Areas of Expertise:
Ferroelectric Memory
OxRAM
Resistive Memory
FET Transistors
Photosensitive Detector
Integrated Circuits
Non-Volatile Memory
Strain Engineering
Silicon-Germanium Films
Dual STI
FinFET
Microelectronic Devices
61 patents (USPTO):Explore Patents
1. 12658233 - Circuit for non-destructive reading of ferroelectric memories (2026-06-16),
2. 12645927 - Non-volatile memories with mixed OxRAM/FeRAM technologies (2026-06-02),
3. 12437792 - Data logic processing circuit integrated in a data storage circuit (2025-10-07),
4. 12363918 - Method for co-manufacturing a ferroelectric memory and an OxRAM resistive memory and device co-integrating a ferroelectric memory and an OxRAM resistive memory (2025-07-15),
5. 12215430 - Method for increasing the surface roughness of a metal layer (2025-02-04),
6. 12094722 - Method for increasing the surface roughness of a metal layer (2024-09-17),
7. 12033696 - Memory circuit comprising a plurality of 1T1R memory cells (2024-07-09),
8. 11944022 - Resistive memory with a switching zone between two dielectric regions having different doping and/or dielectric constants (2024-03-26),
9. 11887662 - Matrix of elementary switches forming a message, associated reading and writing methods (2024-01-30),
10. 11264479 - Process for producing FET transistors (2022-03-01),
11. 11189792 - Oxide-based resistive non-volatile memory cell and method for manufacturing same (2021-11-30),
12. 11145663 - Method for fabricating a ferroelectric memory and method for co-fabrication of a ferroelectric memory and of a resistive memory (2021-10-12),
13. 10985317 - Device for selecting a memory cell (2021-04-20),
14. 10777701 - Photosensitive detector with self-aligned 3D junction and gate (2020-09-15),
15. 10453960 - Transistor having structured source and drain regions and production method thereof (2019-10-22),

Title: The Innovative Path of Laurent Grenouillet

Introduction

Laurent Grenouillet, based in Rives, France, is an influential inventor with an impressive portfolio of 56 patents. His work primarily revolves around advancements in materials and memory circuit technology, reflecting a deep commitment to innovation and research within the tech industry.

Latest Patents

Among Grenouillet's noteworthy contributions are his latest patents which showcase cutting-edge methods and devices. One such patent is a "Method for increasing the surface roughness of a metal layer." This innovative technique involves depositing a sacrificial layer made of a dielectric material containing nitrogen on the metal layer, exposing it to an etching plasma to create asperities, and finally etching the metal layer to transfer these features.

Another significant patent is related to "Memory circuit comprising a plurality of 1T1R memory cells." This invention comprises memory cells incorporating a resistive memory element and an FDSOI type selection transistor. The design facilitates an efficient programming or initialization process by applying a forward back-bias to the selection transistors, enhancing the functionality and efficiency of memory circuits.

Career Highlights

Grenouillet's career has seen him contributing his expertise in reputed organizations. He has worked for the Commissariat à l'Énergie Atomique et aux Énergies Alternatives, where he conducted vital research and development. Additionally, his tenure at STMicroelectronics GmbH allowed him to further refine his skills and project management capabilities, making significant impacts in the semiconductor industry.

Collaborations

Throughout his career, Laurent Grenouillet has collaborated with talented professionals, including Maud Vinet and Yannick Le Tiec. These partnerships have facilitated the exchange of ideas and innovations, leading to the successful realization of his patents and contributing to the advancement of their respective fields.

Conclusion

Laurent Grenouillet stands out as a beacon of innovation, having made substantial contributions through his numerous patents. His work not only reflects his dedication to technology and materials science but also paves the way for future advancements in the industry. His journey as an inventor continues to inspire and influence emerging technologies.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…