logo

For the Inventor, By the Inventor

Portland, OR, United States of America

Sanaz Kabehie Gardner

This inventor holds 72 USPTO granted patents and 8 published patent applications and 6 EPO patents, primarily in Microelectronic Devices (CPC class H01L). Top assignees: Intel Corporation, Tahoe Research, Ltd.. Active years: 2014-2024.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Sanaz Kabehie Gardner. Retrieved from https://idiyas.com/inventor/sanaz-kabehie-gardner

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 72 

% Patents Active = 61.1


Average Co-Inventor Count = 6.7

ph-index = 7

Forward Citations = 202(Granted Patents)

Forward Citations (Not Self Cited) = 179(Dec 10, 2025)


Inventors with similar research interests:


Location History:

  • Hillsboro, OR (US) (2014 - 2023)
  • Portland, OR (US) (2014 - 2023)

Company Filing History:

goldMedal70 out of 56,365 
 
Intel Corporation
 patents
silverMedal2 out of 86 
 
Tahoe Research, Ltd.
 patents

Years Active: 2014-2024

Loading Chart...
Loading Chart...
Areas of Expertise:
Microelectronic Devices
GaN Transistors
Thin Film Transistors
Parasitic Capacitance
III-N Epitaxial Structures
Nanowire Transistors
Heteroepitaxial Structures
Field-Plated Transistors
Envelope Tracking
High Electron Mobility
Co-Integration
CMOS-Compatible
72 patents (USPTO):Explore Patents
1. 12148690 - Microelectronic devices having air gap structures integrated with interconnect for reduced parasitic capacitances (2024-11-19),
2. 12119409 - Multi-layer crystalline back gated thin film transistor (2024-10-15),
3. 11764306 - Multi-layer crystalline back gated thin film transistor (2023-09-19),
4. 11631737 - Ingaas epi structure and wet etch process for enabling III-v GAA in art trench (2023-04-18),
5. 11587862 - Microelectronic devices having air gap structures integrated with interconnect for reduced parasitic capacitances (2023-02-21),
6. 11195944 - Gallium nitride (GaN) transistor structures on a substrate (2021-12-07),
7. 11177376 - III-N epitaxial device structures on free standing silicon mesas (2021-11-16),
8. 11152514 - Multi-layer crystalline back gated thin film transistor (2021-10-19),
9. 11114556 - Gate stack design for GaN e-mode transistor performance (2021-09-07),
10. 11056532 - Techniques for monolithic co-integration of polycrystalline thin-film bulk acoustic resonator devices and monocrystalline III-N semiconductor transistor devices (2021-07-06),
11. 11031305 - Laterally adjacent and diverse group III-N transistors (2021-06-08),
12. 11004982 - Gate for a transistor (2021-05-11),
13. 10998260 - Microelectronic devices having air gap structures integrated with interconnect for reduced parasitic capacitances (2021-05-04),
14. 10930766 - Ge NANO wire transistor with GAAS as the sacrificial layer (2021-02-23),
15. 10930500 - Wurtzite heteroepitaxial structures with inclined sidewall facets for defect propagation control in silicon CMOS-compatible semiconductor devices (2021-02-23),

Title: Sanaz Kabehie Gardner: Pioneering Inventor from Portland

Introduction: Sanaz Kabehie Gardner is a trailblazing inventor based in Portland, Oregon, known for her innovative contributions to various fields.

Latest Patents: Sanaz Kabehie Gardner holds several patents in the areas of sustainable technology, renewable energy, and eco-friendly materials.

Career Highlights: With a background in engineering and a passion for sustainability, Sanaz Kabehie Gardner has led groundbreaking projects that have revolutionized the way we approach environmental challenges.

Collaborations: Throughout her career, Sanaz Kabehie Gardner has collaborated with leading research institutions, universities, and companies to further develop and implement her inventive solutions.

Conclusion: Sanaz Kabehie Gardner's dedication to creating a more sustainable future through her inventive spirit and collaborative efforts continues to inspire and drive positive change in the world.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…