The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 23, 2021
Filed:
Jun. 04, 2019
Intel Corporation, Santa Clara, CA (US);
Sansaptak Dasgupta, Hillsboro, OR (US);
Han Wui Then, Portland, OR (US);
Benjamin Chu-Kung, Portland, OR (US);
Marko Radosavljevic, Beaverton, OR (US);
Sanaz K. Gardner, Hillsboro, OR (US);
Seung Hoon Sung, Portland, OR (US);
Ravi Pillarisetty, Portland, OR (US);
Robert S. Chau, Beaverton, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
III-N semiconductor heterostructures including a raised III-N semiconductor structures with inclined sidewall facets are described. In embodiments, lateral epitaxial overgrowth favoring semi-polar inclined sidewall facets is employed to bend crystal defects from vertical propagation to horizontal propagation. In embodiments, arbitrarily large merged III-N semiconductor structures having low defect density surfaces may be overgrown from trenches exposing a (100) surface of a silicon substrate. III-N devices, such as III-N transistors, may be further formed on the raised III-N semiconductor structures while silicon-based transistors may be formed in other regions of the silicon substrate.