Briarcliff Manor, NY, United States of America

Renee Tong Mo

This inventor holds 98 USPTO granted patents and 5 published patent applications, primarily in III-V Semiconductor Technology (CPC class H01L29-517). Top assignees: International Business Machines Corporation, Freescale Semiconductor,inc., Globalfoundries Inc.. Active years: 2004-2021.

USPTO Granted Patents = 98 

% Patents Active = 29.6

Average Co-Inventor Count = 4.3

ph-index = 13

Forward Citations = 974(Granted Patents)

Forward Citations (Not Self Cited) = 957(Dec 10, 2025)


Inventors with similar research interests:

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Location History:

  • White Plains, NY (US) (2004 - 2008)
  • Birarcliff Manor, NY (US) (2009)
  • Briarcliff, NY (US) (2011)
  • Hopewell Junction, NY (US) (2012 - 2014)
  • Briarcliff Manor, NY (US) (2008 - 2016)
  • Yorktown Height, NY (US) (2017 - 2018)
  • Yorktown Heights, NY (US) (2016 - 2021)

Company Filing History:


Years Active: 2004-2021

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Areas of Expertise:
III-V Semiconductors
CMOS Integration
Lateral Nanowires
Transistor Fabrication
Gate Dielectrics
Strained Regions
Bipolar Integration
High-Germanium Alloys
Automatic Defect Detection
FinFET Structures
Patterned Dielectrics
Passive Structures
98 patents (USPTO):Explore Patents

Title: Innovator Spotlight: Renee Tong Mo

Introduction

Renee Tong Mo, an accomplished inventor based in Briarcliff Manor, NY, has made significant contributions to the field of semiconductor technology. With an impressive portfolio of 98 patents, Mo continues to advance the performance and functionality of electronic devices through his innovative methods and techniques.

Latest Patents

Among his latest patents, one notable innovation is the "III-V extension by high temperature plasma doping." This method involves forming an overlap transistor by creating a gate structure over III-V material. It includes wet cleaning the material adjacent to the gate structure and employing plasma cleaning techniques to enhance its properties. Furthermore, the III-V material is plasma doped to create extension regions that partially extend beneath the gate structure.

Another significant patent is the "III-V CMOS co-integration," which presents a process for fabricating an n-type field effect transistor (nFET). This inventive method encompasses the formation of a mandrel in the wafer region, followed by the growth of III-V semiconductor materials upon it. After the mandrel is removed, additional III-V materials are developed in the source and drain contact spaces, emphasizing a seamless integration of structures.

Career Highlights

Renee Tong Mo has a rich professional background, having worked with renowned companies such as International Business Machines Corporation (IBM) and Globalfoundries Inc. His experiences in these organizations have undoubtedly shaped his approach to semiconductor innovations and contributed to his extensive patent portfolio.

Collaborations

Throughout his career, Mo has collaborated with notable coworkers, including Jeffrey W Sleight and Effendi Leobandung. These partnerships have facilitated the exchange of ideas and methodologies, further enriching the innovations he has been able to produce.

Conclusion

Renee Tong Mo's contributions to the semiconductor industry are invaluable, highlighting the importance of innovation in technology. With a remarkable number of patents and significant collaborations with industry leaders, he remains a key figure pushing the boundaries of electronic device performance. His work continues to inspire future innovations that will shape the landscape of semiconductor applications.

Profile summary based on public USPTO records.
Please report any incorrect information to [email protected]
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