The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 25, 2021

Filed:

Jun. 28, 2016
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Robert L. Bruce, White Plains, NY (US);

Kevin K. Chan, Staten Island, NY (US);

Sebastian U. Engelmann, White Plains, NY (US);

Renee T. Mo, Yorktown Heights, NY (US);

Christopher Scerbo, Bronx, NY (US);

Hongwen Yan, Somers, NY (US);

Jeng-Bang Yau, Yorktown Heights, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/22 (2006.01); H01L 29/10 (2006.01); H01L 21/02 (2006.01); H01L 21/223 (2006.01); H01L 29/20 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/1041 (2013.01); H01L 21/02068 (2013.01); H01L 21/02274 (2013.01); H01L 21/2233 (2013.01); H01L 21/2236 (2013.01); H01L 29/20 (2013.01); H01L 29/66803 (2013.01);
Abstract

A method for forming an overlap transistor includes forming a gate structure over a III-V material, wet cleaning the III-V material on side regions adjacent to the gate structure and plasma cleaning the III-V material on the side regions adjacent to the gate structure. The III-V material is plasma doped on the side regions adjacent to the gate structure to form plasma doped extension regions that partially extend below the gate structure.


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