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For the Inventor, By the Inventor

Ossining, NY, United States of America

Rama Divakaruni

This inventor holds 53 USPTO granted patents and 1 EPO patent, primarily in Semiconductor Technology (CPC class H01L). Top assignees: International Business Machines Corporation, Elpis Technologies Inc., Infineon Technologies Ag. Active years: 2001-2021.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Rama Divakaruni. Retrieved from https://idiyas.com/inventor/rama-divakaruni

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 53

% Patents Active = 56.6


Average Co-Inventor Count = 4.2

ph-index = 16

Forward Citations = 1,590(Granted Patents)

Forward Citations (Not Self Cited) = 1,565(Dec 10, 2025)


Inventors with similar research interests:


Location History:

  • Middletown, NY (US) (2001 - 2004)
  • Somers, NY (US) (2001 - 2008)
  • Ossing, NY (US) (2005 - 2009)
  • Ossining, NY (US) (2003 - 2021)

Company Filing History:

goldMedal42 out of 166,425 
 
International Business Machines Corporation
 patents
silverMedal2 out of 52 
 
Elpis Technologies Inc.
 patents
bronzeMedal2 out of 15,040 
 
Infineon Technologies Ag
 patents
4. 1 out of 5,671 
 
Globalfoundries Inc.
 patents
5. 1 out of 244 
 
Infineon Technologies North America Corp.
 patents
6. 1 out of 2,891 
 
Stmicroelectronics Gmbh
 patents
7. 8 out of 834,601 
Other
 patents
where one patent can have more than one assignee

Years Active: 2001-2021

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Areas of Expertise:
Bipolar Transistor
High-Density Chip Carrier
Fin Isolation Structures
Field Effect Transistor
Vertical DRAM
N-channel MOSFET
Trench Isolation
Self-Aligned Contacts
Capacitance Enhancement
Isolation Structures
Device Performance
Antifuses
53 patents (USPTO):Explore Patents
1. 11177285 - Conductive contacts in semiconductor on insulator substrate (2021-11-16),
2. 10734410 - Conductive contacts in semiconductor on insulator substrate (2020-08-04),
3. 9685535 - Conductive contacts in semiconductor on insulator substrate (2017-06-20),
4. 9673222 - Fin isolation structures facilitating different fin isolation schemes (2017-06-06),
5. 7615457 - Method of fabricating self-aligned bipolar transistor having tapered collector (2009-11-10),
6. 7566599 - High performance FET with elevated source/drain region (2009-07-28),
7. 7462547 - Method of fabricating a bipolar transistor having reduced collector-base capacitance (2008-12-09),
8. 7425754 - Structure and method of self-aligned bipolar transistor having tapered collector (2008-09-16),
9. 7361556 - Method of fabricating semiconductor side wall fin (2008-04-22),
10. 7265417 - Method of fabricating semiconductor side wall fin (2007-09-04),
11. 7190046 - Bipolar transistor having reduced collector-base capacitance (2007-03-13),
12. 7170126 - Structure of vertical strained silicon devices (2007-01-30),
13. 7163864 - Method of fabricating semiconductor side wall fin (2007-01-16),
14. 7112845 - Double gate trench transistor (2006-09-26),
15. 7030481 - High density chip carrier with integrated passive devices (2006-04-18),

Title: Rama Divakaruni: A Pioneer in Semiconductor Innovations

Introduction

Rama Divakaruni is an accomplished inventor based in Ossining, NY, specializing in semiconductor technologies. With an impressive portfolio of 53 patents, Divakaruni has significantly contributed to advancements in the semiconductor field, particularly in the design and functionality of semiconductor devices.

Latest Patents

Among his latest innovations, Divakaruni has developed a patent for "Conductive contacts in semiconductor on insulator substrate." This technology describes a semiconductor device that incorporates a gate stack arranged on a channel region of a semiconductor layer, which is placed on an insulator layer. The invention includes a crystalline source/drain region located in a cavity within the insulator layer, complemented by a spacer adjacent to the gate stack and over the source/drain region. Furthermore, a second insulator layer is positioned on both the spacer and the gate stack, with a conductive contact integrated within the source/drain region. This inventive structure enhances the efficiency and performance of semiconductor devices.

Career Highlights

Rama Divakaruni has made significant strides in his career, working at renowned companies such as International Business Machines Corporation (IBM). His work there has allowed him to be at the forefront of technological advancements in the semiconductor sector, making him a valuable contributor to the field.

Collaborations

Throughout his career, Divakaruni has collaborated with other talented professionals, including Jack Allan Mandelman and Rajarao Jammy. These partnerships have helped facilitate innovative ideas, leading to groundbreaking advancements in semiconductor technologies and applications.

Conclusion

Rama Divakaruni's contributions to the semiconductor industry through his numerous patents highlight his expertise and innovative spirit. With ongoing research and development, he continues to impact the field, paving the way for future advancements in technology. His work not only enhances the performance of semiconductor devices but also signifies the importance of collaboration in driving innovation forward.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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