The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 26, 2006

Filed:

Jun. 18, 2002
Applicants:

James W. Adkisson, Jericho, VT (US);

Paul D. Agnello, Wappingers Falls, NY (US);

Arne W. Ballantine, Round Lake, NY (US);

Rama Divakaruni, Somers, NY (US);

Erin C. Jones, Tuckahoe, NY (US);

Jed H. Rankin, South Burlington, VT (US);

Inventors:

James W. Adkisson, Jericho, VT (US);

Paul D. Agnello, Wappingers Falls, NY (US);

Arne W. Ballantine, Round Lake, NY (US);

Rama Divakaruni, Somers, NY (US);

Erin C. Jones, Tuckahoe, NY (US);

Jed H. Rankin, South Burlington, VT (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/01 (2006.01);
U.S. Cl.
CPC ...
Abstract

A field effect transistor is formed with a sub-lithographic conduction channel and a dual gate which is formed by a simple process by starting with a silicon-on-insulator wafer, allowing most etching processes to use the buried oxide as an etch stop. Low resistivity of the gate, source and drain is achieved by silicide sidewalls or liners while low gate to junction capacitance is achieved by recessing the silicide and polysilicon dual gate structure from the source and drain region edges.


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