The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 16, 2007

Filed:

Oct. 18, 2000
Applicants:

James W. Adkisson, Jericho, VT (US);

Paul D. Agnello, Wappingers Falls, NY (US);

Arne W. Ballantine, Round Lake, NY (US);

Rama Divakaruni, Somers, NY (US);

Erin C. Jones, Tuckahoe, NY (US);

Edward J. Nowak, Essex Junction, VT (US);

Jed H. Rankin, Burlington, VT (US);

Inventors:

James W. Adkisson, Jericho, VT (US);

Paul D. Agnello, Wappingers Falls, NY (US);

Arne W. Ballantine, Round Lake, NY (US);

Rama Divakaruni, Somers, NY (US);

Erin C. Jones, Tuckahoe, NY (US);

Edward J. Nowak, Essex Junction, VT (US);

Jed H. Rankin, Burlington, VT (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

A double gated silicon-on-insulator (SOI) MOSFET is fabricated by forming epitaxially grown channels, followed by a damascene gate. The double gated MOSFET features narrow channels, which increases current drive per layout width and provides low out conductance.


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