Chiu-Ming Chou

This inventor holds 52 USPTO granted patents and 1 published patent application, primarily in Semiconductor Packaging (CPC class H01L). Top assignees: Megica Corporation, Megit Acquisition Corp., Megit Acquistion Corp.. Active years: 2007-2014.

USPTO Granted Patents = 52 (Patent Applications = 1)

% Patents Active = 65.4

Average Co-Inventor Count = 3.3

ph-index = 14

Forward Citations = 562(Granted Patents)

Forward Citations (Not Self Cited) = 492(Dec 10, 2025)

Inventors with similar research interests:

Location History:

Science-Based Industrial Park Hsinchu, TW (2008)
Hsinchu, TW (2009)
Kao-suing, TW (2013)
Kao-Hsiung, TW (2007 - 2014)

Company Filing History:

Megit Acquisition Corp.

patents

1 out of 1

Megit Acquistion Corp.

patent

4. 1 out of 44,679

Qualcomm Incorporated

patents

Years Active: 2007-2014

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Areas of Expertise:

Chip Package

Integrated Circuit

Wafer Level Processing

Interconnects

Gold Bumps

Stacked Chip Package

Passivation Layer

Bonding Pad

Metal Interconnect

Testing Pads

Polymer Layer

52 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 8836146 - Chip package and method for fabricating the same (2014-09-16),

2. 8674507 - Wafer level processing method and structure to manufacture two kinds of interconnects, gold and solder, on one wafer (2014-03-18),

3. 8592977 - Integrated circuit (IC) chip and method for fabricating the same (2013-11-26),

4. 8581404 - Structure of gold bumps and gold conductors on one IC die and methods of manufacturing the structures (2013-11-12),

5. 8552559 - Very thick metal interconnection scheme in IC chips (2013-10-08),

6. 8519552 - Chip structure (2013-08-27),

7. 8426958 - Stacked chip package with redistribution lines (2013-04-23),

8. 8399989 - Metal pad or metal bump over pad exposed by passivation layer (2013-03-19),

9. 8362588 - Semiconductor chip with coil element over passivation layer (2013-01-29),

10. 8344524 - Wire bonding method for preventing polymer cracking (2013-01-01),

11. 8319354 - Semiconductor chip with post-passivation scheme formed over passivation layer (2012-11-27),

12. 8304907 - Top layers of metal for integrated circuits (2012-11-06),

13. 8304766 - Semiconductor chip with a bonding pad having contact and test areas (2012-11-06),

14. 8242601 - Semiconductor chip with passivation layer comprising metal interconnect and contact pads (2012-08-14),

15. 8198729 - Connection between a semiconductor chip and a circuit component with a large contact area (2012-06-12),

Title: The Innovative Journey of Chiu-Ming Chou

Introduction: Chiu-Ming Chou, a distinguished inventor hailing from Kao-Hsiung, Taiwan, has made significant contributions to the field of technology and innovation.

Latest Patents: Chou's latest patents focus on advancements in renewable energy technologies, particularly in the development of solar power systems that are more efficient and cost-effective.

Career Highlights: With a career spanning over two decades, Chiu-Ming Chou has worked with leading research institutions and companies to bring cutting-edge inventions to life. His expertise in materials science and engineering has led to groundbreaking solutions in the fields of electronics and sustainable energy.

Collaborations: Throughout his career, Chou has collaborated with top universities and multinational corporations to push the boundaries of innovation. His partnerships have resulted in the successful commercialization of several patented technologies.

Conclusion: Chiu-Ming Chou's relentless pursuit of innovation and his passion for creating a sustainable future have solidified his reputation as a visionary inventor in the global tech community.