The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 16, 2014

Filed:

Mar. 02, 2007
Applicants:

Chien-kang Chou, Tainan Hsien, TW;

Chiu-ming Chou, Kao-hsiung, TW;

Li-ren Lin, Taipei County, TW;

Hsin-jung Lo, Taipei County, TW;

Inventors:

Chien-Kang Chou, Tainan Hsien, TW;

Chiu-Ming Chou, Kao-hsiung, TW;

Li-Ren Lin, Taipei County, TW;

Hsin-Jung Lo, Taipei County, TW;

Assignee:

Qualcomm Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 25/065 (2006.01); H01L 23/66 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 24/12 (2013.01); H01L 2224/13155 (2013.01); H01L 2224/0401 (2013.01); H01L 2924/12044 (2013.01); H01L 2924/14 (2013.01); H01L 2224/05568 (2013.01); H01L 2224/05559 (2013.01); H01L 2224/48463 (2013.01); H01L 2224/11912 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/4807 (2013.01); H01L 2225/06579 (2013.01); H01L 2924/01007 (2013.01); H01L 2924/01072 (2013.01); H01L 2224/13176 (2013.01); H01L 2924/014 (2013.01); H01L 2224/73204 (2013.01); H01L 24/48 (2013.01); H01L 2224/45147 (2013.01); H01L 2924/01019 (2013.01); H01L 2924/01074 (2013.01); H01L 2225/06506 (2013.01); H01L 2224/04073 (2013.01); H01L 2924/19042 (2013.01); H01L 2224/05024 (2013.01); H01L 24/05 (2013.01); H01L 2924/04953 (2013.01); H01L 2224/48844 (2013.01); H01L 2924/09701 (2013.01); H01L 2224/48453 (2013.01); H01L 2924/01046 (2013.01); H01L 23/3157 (2013.01); H01L 2924/01033 (2013.01); H01L 2224/13139 (2013.01); H01L 2924/19043 (2013.01); H01L 2924/0105 (2013.01); H01L 2924/01023 (2013.01); H01L 2924/19041 (2013.01); H01L 23/66 (2013.01); H01L 2924/01073 (2013.01); H01L 2224/1147 (2013.01); H01L 2924/01013 (2013.01); H01L 2924/01024 (2013.01); H01L 2924/01075 (2013.01); H01L 2224/13164 (2013.01); H01L 2225/06517 (2013.01); H01L 24/16 (2013.01); H01L 2224/05644 (2013.01); H01L 2924/01027 (2013.01); H01L 24/03 (2013.01); H01L 2224/05572 (2013.01); H01L 2924/01082 (2013.01); H01L 24/45 (2013.01); H01L 2224/05027 (2013.01); H01L 2224/13022 (2013.01); H01L 24/73 (2013.01); H01L 2924/01079 (2013.01); H01L 2224/13183 (2013.01); H01L 24/06 (2013.01); H01L 23/4985 (2013.01); H01L 2224/05558 (2013.01); H01L 2224/48145 (2013.01); H01L 2924/00013 (2013.01); H01L 2224/45144 (2013.01); H01L 2224/48644 (2013.01); H01L 2224/13173 (2013.01); H01L 2924/01044 (2013.01); H01L 2924/01028 (2013.01); H01L 2224/05124 (2013.01); H01L 2924/01049 (2013.01); H01L 24/11 (2013.01); H01L 2224/48655 (2013.01); H01L 2924/10329 (2013.01); H01L 2224/13144 (2013.01); H01L 2924/01015 (2013.01); H01L 25/0657 (2013.01); H01L 2224/11902 (2013.01); H01L 2224/48855 (2013.01); H01L 2924/04941 (2013.01); H01L 2924/05042 (2013.01); H01L 2924/01018 (2013.01); H01L 2924/01011 (2013.01); H01L 2924/01078 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/05655 (2013.01); H01L 2224/13169 (2013.01); H01L 2924/01047 (2013.01); H01L 2224/05147 (2013.01); H01L 2924/01045 (2013.01); H01L 224/05155 (2013.01); H01L 2224/48091 (2013.01); H01L 2924/01006 (2013.01); H01L 2924/01029 (2013.01); H01L 2225/06513 (2013.01); H01L 2924/01022 (2013.01); H01L 2924/01014 (2013.01);
Abstract

A chip package includes a semiconductor substrate, a first metal pad over the semiconductor substrate, and a second metal pad over the semiconductor substrate. In a case, the first metal pad is tape automated bonded thereto, and the second metal pad is solder bonded thereto. In another case, the first metal pad is tape automated bonded thereto, and the second metal pad is wirebonded thereto. In another case, the first metal pad is solder bonded thereto, and the second metal pad is wirebonded thereto. In another case, the first metal pad is bonded to an external circuitry using an anisotropic conductive film, and the second metal pad is solder bonded thereto. In another case, the first metal pad is bonded to an external circuitry using an anisotropic conductive film, and the second metal pad is wirebonded thereto.


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