For the Inventor, By the Inventor

Enter assignee name

Hsinchu, Taiwan

Megica Corporation

USPTO Granted Patents = 222

% Expired Patents = 55.0

EPO Patents = 3

Forward Citations = 2,705

Loading Chart...

Loading Chart...

32 inventors (with patents filed for the assignee):

Mou-Shiung Lin (202 out of 364 patents)

Jin-Yuan Lee (106 out of 283 patents)

Chien-Kang Chou (51 out of 61 patents)

4. Chiu-Ming Chou (48 out of 52 patents)

5. Ching-Cheng Huang (37 out of 61 patents)

6. Hsin-Jung Lo (26 out of 30 patents)

7. Shih-Hsiung Lin (16 out of 28 patents)

8. Ying-Chih Chen (9 out of 23 patents)

9. Ke-Hung Chen (8 out of 9 patents)

10. Ming-Ta Lei (7 out of 60 patents)

11. Chuen-Jye Lin (7 out of 16 patents)

12. Ching-San Lin (5 out of 7 patents)

13. Bryan Peng (4 out of 7 patents)

14. Chu-Fu Lin (3 out of 22 patents)

15. Hsi-Shan Kuo (3 out of 5 patents)

Core Competencies:

Semiconductor Packaging

Post Passivation

Chip Structure

High-Performance ICs

Interconnection Schemes

Integrated Circuits

Metal Layers

Solder Bump

System-in Packages

Circuit Components

Wafer Level Processing

Fine-Line Metal

222 patents: Sort by Forward Citations

1. 8558383 - Post passivation structure for a semiconductor device and packaging process for same (2013-10-15),

2. 8552559 - Very thick metal interconnection scheme in IC chips (2013-10-08),

3. 8546947 - Chip structure and process for forming the same (2013-10-01),

4. 8535976 - Method for fabricating chip package with die and substrate (2013-09-17),

5. 8531038 - Top layers of metal for high performance IC's (2013-09-10),

6. 8519552 - Chip structure (2013-08-27),

7. 8503186 - System-in packages (2013-08-06),

8. 8492900 - Post passivation interconnection schemes on top of IC chip (2013-07-23),

9. 8492870 - Semiconductor package with interconnect layers (2013-07-23),

10. 8487400 - High performance system-on-chip using post passivation process (2013-07-16),

11. 8482127 - Post passivation interconnection schemes on top of IC chip (2013-07-09),

12. 8481418 - Low fabrication cost, high performance, high reliability chip scale package (2013-07-09),

13. 8471389 - Multiple selectable function integrated circuit module (2013-06-25),

14. 8471388 - Integrated circuit and method for fabricating the same (2013-06-25),

15. 8471384 - Top layers of metal for high performance IC's (2013-06-25),

Company Overview

Megica Corporation, based in Hsinchu, Taiwan, specializes in semiconductor packaging technologies, focusing on advanced solutions for high-performance integrated circuits. The company is dedicated to innovating in areas such as post passivation techniques, chip structure optimization, and interconnection schemes, which are critical for enhancing the performance and reliability of electronic devices. Megica's expertise in metal layers and solder bump technologies positions it as a key player in the semiconductor industry, catering to the evolving needs of modern electronics.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 13 2026

222 Patents

#40 in Hsinchu

#125 in Taiwan

#3,849 in the World

Hsinchu, Taiwan

Megica Corporation

Forward Citations = 2,705

32 inventors:

Mou-Shiung Lin (202 out of 364 patents)

Jin-Yuan Lee (106 out of 283 patents)

Chien-Kang Chou (51 out of 61 patents)

4. Chiu-Ming Chou (48 out of 52 patents)

5. Ching-Cheng Huang (37 out of 61 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Megica Corporation. Retrieved from https://idiyas.com/company/megica

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

Loading…