Chuen-Jye Lin

USPTO Granted Patents = 16 (Patent Applications = 2)

Average Co-Inventor Count = 3.6

ph-index = 8

Forward Citations = 367(Granted Patents)

Location History:

Ta-Tu Hsiang Taichung, TW (2003 - 2008)
Taichung, TW (2000 - 2014)
Taichung Hsien, TW (2009 - 2016)

Company Filing History:

Taiwan Semiconductor Manufacturing Comp. Ltd.

patents

4. 2 out of 41,454

Qualcomm Incorporated

patents

5. 1 out of 1,093

Vanguard International Semiconductor Corporation

patents

Years Active: 2000-2016

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16 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 9369175 - Low fabrication cost, high performance, high reliability chip scale package (2016-06-14),

2. 8901733 - Reliable metal bumps on top of I/O pads after removal of test probe marks (2014-12-02),

3. 8685834 - Fabrication method of package structure with simplified encapsulation structure and simplified wiring (2014-04-01),

4. 8481418 - Low fabrication cost, high performance, high reliability chip scale package (2013-07-09),

5. 8178967 - Low fabrication cost, high performance, high reliability chip scale package (2012-05-15),

6. 8158508 - Structure and manufacturing method of a chip scale package (2012-04-17),

7. 7902679 - Structure and manufacturing method of a chip scale package with low fabrication cost, fine pitch and high reliability solder bump (2011-03-08),

8. 7638887 - Package structure and fabrication method thereof (2009-12-29),

9. 7465653 - Reliable metal bumps on top of I/O pads after removal of test probe marks (2008-12-16),

10. 7355288 - Low fabrication cost, high performance, high reliability chip scale package (2008-04-08),

11. 7338890 - Low fabrication cost, high performance, high reliability chip scale package (2008-03-04),

12. 7105920 - Substrate design to improve chip package reliability (2006-09-12),

13. 6917119 - Low fabrication cost, high performance, high reliability chip scale package (2005-07-12),

14. 6815324 - Reliable metal bumps on top of I/O pads after removal of test probe marks (2004-11-09),

15. 6642136 - Method of making a low fabrication cost, high performance, high reliability chip scale package (2003-11-04),

Title: The Innovative Journey of Chuen-Jye Lin

Introduction: Chuen-Jye Lin, a pioneering inventor hailing from Taichung, Taiwan, has made significant contributions to the world of technology and innovation through his groundbreaking inventions.

Latest Patents: Chuen-Jye Lin holds several patents in the field of electronics and semiconductor technology, with his most recent patent focusing on advanced nanotechnology applications in microchips.

Career Highlights: With a career spanning over two decades, Chuen-Jye Lin has worked for leading tech companies, where he played a key role in developing cutting-edge technologies that have revolutionized the industry.

Collaborations: Throughout his career, Chuen-Jye Lin has collaborated with top researchers, engineers, and scientists from around the globe, fostering a culture of innovation and excellence in all his projects.

Conclusion: Chuen-Jye Lin's passion for innovation and his relentless pursuit of technological advancement continue to inspire the next generation of inventors and shape the future of the tech industry.

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2 patents pending:

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