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Hsinchu, Taiwan

Megic Corporation

USPTO Granted Patents = 44

% Expired Patents = 9.1

Forward Citations = 2,113

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21 inventors (with patents filed for the assignee):

Mou-Shiung Lin (33 out of 364 patents)

Jin-Yuan Lee (21 out of 283 patents)

Ching-Cheng Huang (15 out of 61 patents)

4. Ming-Ta Lei (3 out of 60 patents)

5. Chuen-Jye Lin (3 out of 16 patents)

6. Bryan Peng (3 out of 7 patents)

7. Chien-Kang Chou (2 out of 61 patents)

8. Jin Yuan Lee (2 out of 7 patents)

9. Ming Ta Lei (2 out of 3 patents)

10. Kuo-Hui Wan (2 out of 2 patents)

11. Sehat Sutardja (1 out of 495 patents)

12. Shih-Hsiung Lin (1 out of 28 patents)

13. Hsien-Tsung Liu (1 out of 5 patents)

14. Hsi-Shan Kuo (1 out of 5 patents)

15. Eric Lin (1 out of 3 patents)

Core Competencies:

Integrated Circuits

Chip Scale Package

Post Passivation

High Performance

Thermal Compliance

Electrode Structures

Wafer Scale Packaging

Metal Bumps

Solder Bump

Cylindrical Bonding

Silicon Substrate

RF Integrated Circuits

44 patents: Sort by Forward Citations

1. 7288845 - Fabrication of wire bond pads over underlying active devices, passive devices and/or dielectric layers in integrated circuits (2007-10-30),

2. 7045901 - Chip-on-chip connection with second chip located in rectangular open window hole in printed circuit board (2006-05-16),

3. 6939747 - Multiple selectable function integrated circuit module (2005-09-06),

4. 6936531 - Process of fabricating a chip structure (2005-08-30),

5. 6917119 - Low fabrication cost, high performance, high reliability chip scale package (2005-07-12),

6. 6897507 - Capacitor for high performance system-on-chip using post passivation device (2005-05-24),

7. 6869870 - High performance system-on-chip discrete components using post passivation process (2005-03-22),

8. 6818545 - Low fabrication cost, fine pitch and high reliability solder bump (2004-11-16),

9. 6815324 - Reliable metal bumps on top of I/O pads after removal of test probe marks (2004-11-09),

10. 6809935 - Thermally compliant PCB substrate for the application of chip scale packages (2004-10-26),

11. 6806570 - Thermal compliant semiconductor chip wiring structure for chip scale packaging (2004-10-19),

12. 6802945 - Method of metal sputtering for integrated circuit metal routing (2004-10-12),

13. 6800941 - Integrated chip package structure using ceramic substrate and method of manufacturing the same (2004-10-05),

14. 6798073 - Chip structure and process for forming the same (2004-09-28),

15. 6791192 - Multiple chips bonded to packaging structure with low noise and multiple selectable functions (2004-09-14),

Company Overview

Megic Corporation, headquartered in Hsinchu, Taiwan, specializes in advanced semiconductor technologies, focusing on integrated circuits and chip scale packaging. The company is recognized for its expertise in system-on-chip designs and innovative post passivation processes, which enhance device performance and reliability. Additionally, Megic develops thermal compliant PCBs and electroplating structures, catering to high-performance RF ICs and ceramic substrate solutions, positioning itself as a key player in the semiconductor industry.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 20 2026

44 Patents

#103 in Hsinchu

#443 in Taiwan

#15,768 in the World

Hsinchu, Taiwan

Megic Corporation

Forward Citations = 2,113

21 inventors:

Mou-Shiung Lin (33 out of 364 patents)

Jin-Yuan Lee (21 out of 283 patents)

Ching-Cheng Huang (15 out of 61 patents)

4. Ming-Ta Lei (3 out of 60 patents)

5. Chuen-Jye Lin (3 out of 16 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Megic Corporation. Retrieved from https://idiyas.com/company/megic

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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