The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 30, 2007
Filed:
May. 08, 2003
Sehat Sutardja, Los Altos Hills, CA (US);
Albert Wu, Palo Alto, CA (US);
Jin-yuan Lee, Hsin-chu, TW;
Mou-shiung Lin, Hsin-chu, TW;
Sehat Sutardja, Los Altos Hills, CA (US);
Albert Wu, Palo Alto, CA (US);
Jin-Yuan Lee, Hsin-chu, TW;
Mou-Shiung Lin, Hsin-chu, TW;
Marvell Semiconductor, Inc., Sunnyvale, CA (US);
MEGIC Corporation, Hsinchu, TW;
Abstract
A wire connection structure for an integrated circuit (IC) die includes a semiconductor wafer with an active device and/or a passive device. One or more dielectric layers are arranged adjacent to the active and/or passive device. One or more metal interconnect layers are arranged adjacent to the active and/or passive device. A contact pad is arranged in an outermost metal interconnect layer. A passivation layer is arranged over the outermost metal interconnect layer and includes at least one passivation opening that exposes the contact pad. A bond pad is arranged over the passivation layer and the active and/or passive device and is connected to the contact pad through the passivation opening. Formation of the bond pad does not damage the active and/or passive device.