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For the Inventor, By the Inventor

Singapore, Singapore

Young Way Teh

This inventor holds 21 USPTO granted patents and 1 published patent application, primarily in Semiconductor Devices. Top assignees: Chartered Semiconductor Manufacturing Ltd (Corporation), International Business Machines Corporation, Globalfoundries Singapore Pte. Ltd.. Active years: 2007-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Young Way Teh. Retrieved from https://idiyas.com/inventor/young-way-teh

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 21 

% Patents Active = 42.9

Average Co-Inventor Count = 5.3

ph-index = 6

Forward Citations = 304(Granted Patents)


Location History:

  • Singapore, MY (2013)
  • Singapore, SG (2007 - 2014)
  • Wappingers Falls, NY (US) (2014)
  • Wappinger Falls, NY (US) (2014)

Company Filing History:

goldMedal12 out of 962 
 
Chartered Semiconductor Manufacturing Ltd (Corporation)
 patents
silverMedal8 out of 166,524 
 
International Business Machines Corporation
 patents
bronzeMedal6 out of 1,065 
 
Globalfoundries Singapore Pte. Ltd.
 patents
4. 4 out of 138,671 
 
Samsung Electronics Co., Ltd.
 patents
5. 2 out of 5,491 
 
Freescale Semiconductor,inc.
 patents
6. 2 out of 5,671 
 
Globalfoundries Inc.
 patents
7. 1 out of 244 
 
Infineon Technologies North America Corp.
 patents
where one patent can have more than one assignee

Years Active: 2007-2025

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Areas of Expertise:
Flash Memory
High-K Metal Gate
Local Contact
Low-K Dielectric
Integrated Circuit
Strain Engineering
Transistor Fabrication
Short Channel Effects
Dual Stress Memory
Spacer Removal
Mechanical Stress
Composite Stress Spacer
21 patents (USPTO):Explore Patents
1. 12266702 - Flash memory devices with thickened source/drain silicide (2025-04-01),
2. 8853796 - High-K metal gate device (2014-10-07),
3. 8664717 - Semiconductor device with an oversized local contact as a Faraday shield (2014-03-04),
4. 8624329 - Spacer-less low-K dielectric processes (2014-01-07),
5. 8563394 - Integrated circuit structure having substantially planar N-P step height and methods of forming (2013-10-22),
6. 8519445 - Poly profile engineering to modulate spacer induced stress for device enhancement (2013-08-27),
7. 8461009 - Spacer and process to enhance the strain in the channel with stress liner (2013-06-11),
8. 8106462 - Balancing NFET and PFET performance using straining layers (2012-01-31),
9. 7999325 - Method to remove spacer after salicidation to enhance contact etch stop liner stress on MOS (2011-08-16),
10. 7993997 - Poly profile engineering to modulate spacer induced stress for device enhancement (2011-08-09),
11. 7977185 - Method and apparatus for post silicide spacer removal (2011-07-12),
12. 7883953 - Method for transistor fabrication with optimized performance (2011-02-08),
13. 7867835 - Integrated circuit system for suppressing short channel effects (2011-01-11),
14. 7785950 - Dual stress memory technique method and related structure (2010-08-31),
15. 7759206 - Methods of forming semiconductor devices using embedded L-shape spacers (2010-07-20),

Title: Young Way Teh: Pioneering Inventor from Singapore

Introduction: Young Way Teh is a distinguished inventor hailing from Singapore, known for his groundbreaking contributions to the field of technology and innovation.

Latest Patents: Young Way Teh holds several patents in various technological domains, showcasing his continuous commitment to pushing the boundaries of innovation.

Career Highlights: Throughout his illustrious career, Young Way Teh has been instrumental in developing cutting-edge technologies that have revolutionized industries and improved the quality of life for many.

Collaborations: Young Way Teh has collaborated with leading research institutions, universities, and companies worldwide, fostering a culture of innovation and knowledge sharing.

Conclusion: Young Way Teh's passion for innovation and his relentless pursuit of excellence make him a true trailblazer in the world of inventions, inspiring the next generation of inventors to dream big and create a better future.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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