The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 22, 2013

Filed:

Apr. 11, 2011
Applicants:

Weipeng LI, Ossining, NY (US);

Deleep R. Nair, Fishkill, NY (US);

Jae-eun Park, Wappingers Falls, NY (US);

Voon-yew Thean, Fishkill, NY (US);

Young Way Teh, Singapore, SG;

Inventors:

Weipeng Li, Ossining, NY (US);

Deleep R. Nair, Fishkill, NY (US);

Jae-Eun Park, Wappingers Falls, NY (US);

Voon-Yew Thean, Fishkill, NY (US);

Young Way Teh, Singapore, SG;

Assignees:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/76 (2006.01);
U.S. Cl.
CPC ...
Abstract

Solutions for forming an integrated circuit structure having a substantially planar N-P step height are disclosed. In one embodiment, a method includes: providing a structure having an n-type field effect transistor (NFET) region and a p-type field effect transistor (PFET) region; forming a mask over the PFET region to leave the NFET region exposed; performing dilute hydrogen-flouride (DHF) cleaning on the exposed NFET region to substantially lower an STI profile of the NFET region; and forming a silicon germanium (SiGE) channel in the PFET region after the performing of the DHF.


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