The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 01, 2025

Filed:

Jun. 08, 2022
Applicant:

Globalfoundries Singapore Pte. Ltd., Singapore, SG;

Inventors:

Young Way Teh, Singapore, SG;

Bin Zhu, Singapore, SG;

Madhu Sudan Mukhopadhyay, Singapore, SG;

Subramanian Sundareswara, Singapore, SG;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/417 (2006.01); H10B 41/10 (2023.01); H10B 41/23 (2023.01); H10B 43/10 (2023.01); H10B 43/23 (2023.01); H10D 62/10 (2025.01); H10D 64/23 (2025.01);
U.S. Cl.
CPC ...
H10D 64/259 (2025.01); H10B 41/10 (2023.02); H10B 41/23 (2023.02); H10B 43/10 (2023.02); H10B 43/23 (2023.02); H10D 62/115 (2025.01);
Abstract

Structures for a memory device and methods of forming a structure for a memory device. The structure includes a first and second source/drain regions in a semiconductor substrate, a first gate stack on the semiconductor substrate, and a second gate stack on the semiconductor substrate adjacent to the first gate stack. The first and second gate stacks are positioned in a lateral direction between the first source/drain region and the second source/drain region. The first gate stack includes first and second gate electrodes, and the first gate electrode includes segments spaced apart along a longitudinal axis of the first gate stack.


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