Hopewell Junction, NY, United States of America

Stuart A Sieg

This inventor holds 72 USPTO granted patents and 4 published patent applications and 2 EPO patents, primarily in Vertical Transistors (CPC class H01L). Top assignees: International Business Machines Corporation, Adeia Semiconductor Bonding Technologies Inc., Globalfoundries Inc.. Active years: 2012-2026.

USPTO Granted Patents = 72 (Patent Applications = 4)

% Patents Active = 70.8

EPO Patents = 2 (Patent Applications = 3)

Average Co-Inventor Count = 4.6

ph-index = 8

Forward Citations = 184(Granted Patents)

Forward Citations (Not Self Cited) = 153(Dec 10, 2025)

Inventors with similar research interests:

Location History:

Hopewell Junction, NY (US) (2012 - 2013)
Albany, NY (US) (2014 - 2024)

Company Filing History:

66 out of 166,159

International Business Machines Corporation

patents

4 out of 1,904

Adeia Semiconductor Bonding Technologies Inc.

Years Active: 2012-2026

Loading Chart...

Areas of Expertise:

Gate Contact

Vertical Transistor

Power Delivery Network

Fin Field Effect Transistor

Self-Aligned Double Patterning

High Aspect Ratio

Tight-Pitch Line Formation

Selective Material Deposition

EUV Lithography

Transistor Density

Device Performance

72 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12635491 - Replacement buried power rail (2026-05-19),

2. 12616019 - Via connection to backside power delivery network (2026-04-28),

3. 12593668 - Shallow and deep contacts with stitching (2026-03-31),

4. 12581702 - Common self aligned gate contact for stacked transistor structures (2026-03-17),

5. 12563817 - Integrating gate-cuts and single diffusion break isolation post-RMG using low-temperature protective liners (2026-02-24),

6. 12444653 - Buried power rail at tight cell-to-cell space (2025-10-14),

7. 12406930 - Structure containing a via-to-buried power rail contact structure or a via-to-backside power rail contact structure (2025-09-02),

8. 12324236 - Bottom contact for stacked GAA FET (2025-06-03),

9. 12268026 - High aspect ratio contact structure with multiple metal stacks (2025-04-01),

10. 12148617 - Structure and method to pattern pitch lines (2024-11-19),

11. 12080559 - Using a same mask for direct print and self-aligned double patterning of nanosheets (2024-09-03),

12. 11990412 - Buried power rails located in a base layer including first, second, and third etch stop layers (2024-05-21),

13. 11610780 - Alternating hardmasks for tight-pitch line formation (2023-03-21),

14. 11257681 - Using a same mask for direct print and self-aligned double patterning of nanosheets (2022-02-22),

15. 11205723 - Selective source/drain recess for improved performance, isolation, and scaling (2021-12-21),

Title: The Innovations of Stuart A Sieg: Pioneering Technologies in Semiconductor Industry

Introduction: Stuart A Sieg, a prolific inventor based in Hopewell Junction, NY, has made significant contributions to the field of semiconductor technology with an impressive portfolio of 61 patents.

Latest Patents: Among his recent patents, one of the groundbreaking ideas involves buried power rails located in a base layer with multiple etch stop layers. Another innovative concept includes alternating hardmasks for tight-pitch line formation, revolutionizing the method for forming fins in semiconductor manufacturing.

Career Highlights: Stuart A Sieg has excelled in his career with notable tenures at renowned companies such as IBM and Tessera, Inc. His expertise and innovative spirit have played a pivotal role in advancing semiconductor technologies.

Collaborations: Throughout his career, Stuart A Sieg has collaborated closely with esteemed colleagues like Fee Li Lie and Sivananda K Kanakasabapathy, fostering a culture of innovation and knowledge sharing within the semiconductor industry.

Conclusion: Stuart A Sieg's relentless pursuit of innovation and his remarkable patent portfolio underscore his status as a trailblazer in the semiconductor domain. His contributions continue to shape the future of technology, making him a standout figure in the world of inventions and patents.