The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 21, 2024

Filed:

Sep. 29, 2021
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Ruilong Xie, Niskayuna, NY (US);

Stuart Sieg, Albany, NY (US);

Somnath Ghosh, Clifton Park, NY (US);

Kisik Choi, Watervliet, NY (US);

Rishikesh Krishnan, Cohoes, NY (US);

Alexander Reznicek, Troy, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/528 (2006.01); H01L 21/311 (2006.01); H01L 21/768 (2006.01); H01L 21/8238 (2006.01); H01L 23/522 (2006.01); H01L 27/092 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5286 (2013.01); H01L 21/31116 (2013.01); H01L 21/76816 (2013.01); H01L 21/76829 (2013.01); H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H01L 21/823871 (2013.01); H01L 27/092 (2013.01); H01L 29/0665 (2013.01); H01L 29/42392 (2013.01);
Abstract

Integrated chips and methods of forming the same include forming a stack of layers, including a device stack above a first sacrificial layer, above a substrate. The first sacrificial layer is replaced with a first etch stop layer. The substrate is removed, exposing a substrate-side of the stack of layers. The substrate-side of the stack of layers is etched to form a trench, stopping on the first etch stop layer. A conductive line is formed in the trench.


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