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For the Inventor, By the Inventor

Dresden, Germany

Karsten Wieczorek

This inventor holds 77 USPTO granted patents and 3 EPO patents, primarily in Semiconductor Devices (CPC class H01L). Top assignees: Advanced Micro Devices Corporation, Globalfoundries Inc.. Active years: 2000-2012.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Karsten Wieczorek. Retrieved from https://idiyas.com/inventor/karsten-wieczorek

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 77

% Patents Active = 80.5


Average Co-Inventor Count = 3.2

ph-index = 14

Forward Citations = 924(Granted Patents)

Forward Citations (Not Self Cited) = 909(Dec 10, 2025)


Inventors with similar research interests:


Location History:

  • Reichenberg-Boxdorf, DE (2000 - 2003)
  • Boxdorf, DE (2000 - 2005)
  • Am Schulfeld, DE (2004 - 2005)
  • Dresden, DE (2004 - 2012)

Company Filing History:

goldMedal75 out of 13,161 
 
Advanced Micro Devices Corporation
 patents
silverMedal2 out of 5,671 
 
Globalfoundries Inc.
 patents

Years Active: 2000-2012

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Areas of Expertise:
Transistor Characteristics
Gate Structures
Silicide Fabrication
CMOS Devices
Field Effect Transistor
Dopant Profiles
Dielectric Materials
Thin Oxide Layers
Strain Films
T-Shaped Gate
Annealing Techniques
Leakage Current
77 patents (USPTO):Explore Patents
1. 8188871 - Drive current adjustment for transistors by local gate engineering (2012-05-29),
2. 8097542 - Etch stop layer of reduced thickness for patterning a dielectric material in a contact level of closely spaced transistors (2012-01-17),
3. 8039338 - Method for reducing defects of gate of CMOS devices during cleaning processes by modifying a parasitic PN junction (2011-10-18),
4. 7994037 - Gate dielectrics of different thickness in PMOS and NMOS transistors (2011-08-09),
5. 7955937 - Method for manufacturing semiconductor device comprising SOI transistors and bulk transistors (2011-06-07),
6. 7745334 - Technique for locally adapting transistor characteristics by using advanced laser/flash anneal techniques (2010-06-29),
7. 7494872 - Field effect transistor having a doped gate electrode with reduced gate depletion and method of forming the transistor (2009-02-24),
8. 7419867 - CMOS gate structure comprising predoped semiconductor gate material with improved uniformity of dopant distribution and method of forming the structure (2008-09-02),
9. 7297994 - Semiconductor device having a retrograde dopant profile in a channel region (2007-11-20),
10. 7238578 - Method of forming a semiconductor structure comprising transistor elements with differently stressed channel regions (2007-07-03),
11. 7226859 - Method of forming different silicide portions on different silicon-containing regions in a semiconductor device (2007-06-05),
12. 7217657 - Semiconductor device having different metal silicide portions and method for fabricating the semiconductor device (2007-05-15),
13. 7192881 - Method of forming sidewall spacer elements for a circuit element by increasing an etch selectivity (2007-03-20),
14. 7148145 - Semiconductor device having T-shaped gate structure comprising in situ sidewall spacers and method of forming the semiconductor device (2006-12-12),
15. 7122410 - Polysilicon line having a metal silicide region enabling linewidth scaling including forming a second metal silicide region on the substrate (2006-10-17),

Title: Innovations of Karsten Wieczorek: A Pioneer in Semiconductor Technologies

Introduction: Karsten Wieczorek, based in Dresden, Germany, is a prominent inventor renowned for his extensive contributions to the field of semiconductor technology. With an impressive portfolio of 77 patents, Wieczorek has played a critical role in advancing innovations that enhance the performance and efficiency of semiconductor devices.

Latest Patents: Among his latest patents, Wieczorek introduced a groundbreaking method for drive current adjustment in transistors through local gate engineering. This innovation allows for the effective modification of drive current capabilities by varying the gate dielectric thickness and gate length of transistors within a memory cell. By implementing local variations along the width of the transistor, his approach not only simplifies the active region’s geometry but also enhances production yield by minimizing the risk of short circuits caused by nickel silicide portions.

Additionally, Wieczorek has developed a method involving an etch stop layer of reduced thickness for patterning dielectric materials in closely spaced transistors. In this technique, an intermediate etch stop material is produced via a plasma-assisted oxidation process, allowing for a thinner layer that reduces deposition irregularities. This innovation leads to a significant reduction in yield loss, particularly for highly scaled semiconductor devices.

Career Highlights: Karsten Wieczorek has held pivotal positions in leading technology firms, including Advanced Micro Devices Corporation and Globalfoundries Inc. His work has significantly influenced the development and manufacturing of advanced semiconductor technologies, contributing to the competitive edge of these companies in the global market.

Collaborations: Throughout his career, Wieczorek has collaborated with notable peers, including Manfred Horstmann and Rolf Stephan. These partnerships have fostered an environment of innovation and creativity, enabling the successful development and implementation of cutting-edge technologies in the semiconductor sector.

Conclusion: Karsten Wieczorek is a distinguished inventor whose contributions to semiconductor innovations have had a profound impact on the industry. With 77 patents to his name, his work continues to inspire advancements that enhance the performance and efficiency of electronic devices. His career exemplifies the vital role of inventors in shaping the future of technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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