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For the Inventor, By the Inventor

Escondido, CA, United States of America

Joan Rey Villarba Buot

This inventor holds 31 USPTO granted patents and 70 published patent applications and 2 EPO patents, primarily in Integrated Circuit Packaging. Top assignee: Qualcomm Incorporated. Active years: 2022-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Joan Rey Villarba Buot. Retrieved from https://idiyas.com/inventor/joan-rey-villarba-buot

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 31 

% Patents Active = 96.8

 

Average Co-Inventor Count = 3.4

ph-index = 1

Forward Citations = 6(Granted Patents)


Company Filing History:

goldMedal31 out of 45,176 
 
Qualcomm Incorporated
 patents

Years Active: 2022-2026

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Areas of Expertise:
Integrated Circuit Package
Substrate
Interconnects
Thermal Management
Embedded Trace Substrate
Die
Capacitors
Power Distribution Network
Signal Routing
Antenna Module
Electrical Shielding
Fabrication Methods
31 patents (USPTO):Explore Patents
1. 12787819 - Package substrate comprising embedded integrated device (2026-11-03),
2. 12740420 - Structure for delamination mitigation in a semiconductor device (2026-09-15),
3. 12733095 - Package comprising a substrate with an interconnect block (2026-09-08),
4. 12696780 - Package comprising a substrate with cavity and an integrated device with a step back side (2026-07-28),
5. 12672572 - Package comprising a substrate with interconnects (2026-06-30),
6. 12667029 - Package comprising a substrate with post interconnects and a solder resist layer having a cavity (2026-06-23),
7. 12648465 - Embedded trace substrates (ETSs) with T-shaped interconnects with reduced-width embedded metal traces, and related integrated circuit (IC) packages and fabrication methods (2026-06-02),
8. 12628429 - Deep trench capacitors (DTCs) employing bypass metal trace signal routing, and related integrated circuit (IC) packages and fabrication methods (2026-05-12),
9. 12622313 - Metal pocket fanout package (2026-05-05),
10. 12610869 - Integrated circuit (IC) package employing a metal block with metal interconnects thermally coupling a die to an interposer substrate for dissipating thermal energy of the die, and related fabrication methods (2026-04-21),
11. 12593709 - Substrate(s) for an integrated circuit (IC) package employing a core layer and an adjacent insulation layer(s) with an embedded metal structure(s) positioned from the core layer (2026-03-31),
12. 12581966 - Electronic component placed on core of substrate (2026-03-17),
13. 12500146 - Substrate(s) for an integrated circuit (IC) package employing a metal core for improved electrical shielding and structural strength, and related IC packages and fabrication methods (2025-12-16),
14. 12381174 - Integrated circuit (IC) packages employing wire bond channel over package substrate, and related fabrication methods (2025-08-05),
15. 12362269 - Integrated circuit (IC) packages employing supplemental metal layer coupled to embedded metal traces in a die-side embedded trace substrate (ETS) layer, and related fabrication methods (2025-07-15),

Title: Joan Rey Villarba Buot: A Leader in Integrated Circuit Innovations

Introduction: Joan Rey Villarba Buot is an accomplished inventor based in Escondido, California, recognized for his significant contributions to the field of integrated circuit (IC) packages. With a remarkable portfolio of 18 patents, Joan has made considerable advancements that enhance the efficiency and performance of electronic devices.

Latest Patents: Among his most recent innovations, Joan has developed two noteworthy patents. The first is titled "Integrated circuit (IC) packages employing wire bond channel over package substrate, and related fabrication methods." This invention introduces a wire bond channel facilitating signal routing paths between a first semiconductor die and an electronic device, optimizing vertical wire bonds to improve direct signal connections without navigating around package substrate obstacles.

The second patent is titled "Integrated circuit (IC) packages employing supplemental metal layer coupled to embedded metal traces in a die-side embedded trace substrate (ETS) layer, and related fabrication methods." This innovative design addresses metal density mismatch by integrating a supplemental metal layer adjacent to the die-side ETS metallization layer, enhancing the electrical coupling and increasing the metal density of interconnects.

Career Highlights: Joan Rey Villarba Buot currently works at Qualcomm Incorporated, a leading company in the telecommunications and semiconductor industry. His expertise in integrated circuit design is instrumental to Qualcomm's ongoing innovation and development of cutting-edge technologies.

Collaborations: Throughout his career, Joan has collaborated with talented colleagues such as Aniket Patil and Hong Bok We. These partnerships have bolstered the innovative processes within the team, leading to groundbreaking advancements in integrated circuit technology.

Conclusion: Joan Rey Villarba Buot's dedication to innovation in integrated circuit packages has significantly impacted the electronics industry. His patents exemplify a commitment to improving device efficiency and performance. With his continued work at Qualcomm and collaboration with fellow innovators, the future holds great promise for further advancements in technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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