The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 2026

Filed:

Dec. 07, 2023
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Joan Rey Villarba Buot, Escondido, CA (US);

Aniket Patil, San Diego, CA (US);

Zhijie Wang, San Diego, CA (US);

Assignee:

QUALCOMM INCORPORATED, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10W 70/68 (2026.01); H10W 70/60 (2026.01); H10W 70/65 (2026.01); H10W 70/685 (2026.01); H10W 74/01 (2026.01); H10W 74/10 (2026.01); H10W 90/00 (2026.01); H10W 74/15 (2026.01);
U.S. Cl.
CPC ...
H10W 70/682 (2026.01); H10W 70/611 (2026.01); H10W 70/65 (2026.01); H10W 70/685 (2026.01); H10W 74/01 (2026.01); H10W 74/117 (2026.01); H10W 90/701 (2026.01); H10W 74/15 (2026.01); H10W 90/724 (2026.01); H10W 90/732 (2026.01); H10W 90/734 (2026.01);
Abstract

A package comprising a first substrate; an integrated device coupled to the first substrate, wherein the integrated device comprises a step back side; a second substrate comprising a cavity, wherein the integrated device is located at least partially in the cavity of the second substrate; and an encapsulation layer coupled to the first substrate and the second substrate. The encapsulation layer is located between the first substrate and the second substrate. The encapsulation layer is located at least partially in the cavity of the second substrate.


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