Hefei, China

Jo-lan Chin

This inventor holds 15 USPTO granted patents and 2 published patent applications and 1 EPO patent, primarily in Semiconductor Fabrication. Top assignee: Changxin Memory Technologies, Inc.. Active years: 2024-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jo-lan Chin. Retrieved from https://idiyas.com/inventor/jo-lan-chin-iqv4oqja

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 15 

% Patents Active = 93.3

 

Average Co-Inventor Count = 3.7

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2024-2026

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Areas of Expertise:
Semiconductor Structure
Fabrication Method
Vertical Gate Transistor
Manufacturing Process
Semiconductor Pillars
Device Contour
Dual Gate Structures
Semiconductor Device
Method for Fabrication
Semiconductor Manufacturing
15 patents (USPTO):Explore Patents

Title: Jo-lan Chin: Innovator in Semiconductor Technology

Introduction

Jo-lan Chin is a prominent inventor based in Hefei, China, known for his significant contributions to the field of semiconductor technology. With a total of 15 patents to his name, he has made remarkable advancements that have the potential to influence the future of electronics.

Latest Patents

Among his latest patents is a groundbreaking invention titled "Semiconductor structure with semiconductor pillars and method for manufacturing same." This patent describes a semiconductor structure that includes a substrate, a first gate structure, and a second gate structure. The substrate features discrete first semiconductor pillars arranged vertically, along with second and third semiconductor pillars positioned atop each first semiconductor pillar. The first gate structure surrounds the first semiconductor pillar, while the second gate structure encompasses the second and third semiconductor pillars, incorporating both a first and a second ring structure.

Another notable patent is for a "Semiconductor structure and method for manufacturing semiconductor structure." This invention relates to the technical field of semiconductors and includes a substrate with multiple first trenches and second trenches. Active pillars are situated between these trenches, and first conductive layers are arranged on the sidewalls of the active pillars, enhancing the overall functionality of the semiconductor structure.

Career Highlights

Jo-lan Chin is currently employed at Changxin Memory Technologies, Inc., where he continues to innovate and develop new semiconductor technologies. His work has positioned him as a key player in the semiconductor industry, contributing to advancements that are critical for modern electronics.

Collaborations

Throughout his career, Jo-lan has collaborated with talented individuals such as Semyeong Jang and Joonsuk Moon. These collaborations have fostered an environment of innovation and creativity, leading to the development of cutting-edge technologies.

Conclusion

Jo-lan Chin's contributions to semiconductor technology through his patents and collaborations highlight his role as a leading inventor in the field. His work not only advances technology but also sets the stage for future innovations in electronics.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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