The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 23, 2025

Filed:

Sep. 23, 2022
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventors:

Semyeong Jang, Hefei, CN;

Joonsuk Moon, Hefei, CN;

Deyuan Xiao, Hefei, CN;

Jo-Lan Chin, Hefei, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10B 12/00 (2023.01); G11C 5/06 (2006.01); H10D 1/68 (2025.01);
U.S. Cl.
CPC ...
H10B 12/315 (2023.02); G11C 5/063 (2013.01); H10B 12/033 (2023.02); H10B 12/05 (2023.02);
Abstract

A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure includes a substrate, a gate structure and a dielectric layer. Herein, the substrate includes discrete semiconductor pillars. The semiconductor pillars are arranged at the top of the substrate and extend in a vertical direction. The substrate further includes a capacitor structure located at the top of the semiconductor pillar. The gate structure is arranged at the middle area of the semiconductor pillar and surrounds the semiconductor pillar. The dielectric layer is located between the gate structure and the semiconductor pillar, and covers the sidewall of the semiconductor pillar.


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