Gert J Leusink

This inventor holds 20 USPTO granted patents, primarily in Semiconductor Fabrication. Top assignees: Tokyo Electron Limited, International Business Machines Corporation. Active years: 1999-2017.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Gert J Leusink. Retrieved from https://idiyas.com/inventor/gert-j-leusink

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

USPTO Granted Patents = 20

% Patents Active = 60.0

Average Co-Inventor Count = 3.5

ph-index = 8

Forward Citations = 336(Granted Patents)

Location History:

Tempe, AZ (US) (1999 - 2005)
Hopewell Junction, NY (US) (2006)
Saltpoint, NY (US) (2005 - 2014)
Albany, NY (US) (2017)

Company Filing History:

19 out of 10,947

Tokyo Electron Limited

patents

7 out of 166,483

International Business Machines Corporation

patents

where one patent can have more than one assignee

Years Active: 1999-2017

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Areas of Expertise:

Atomic Layer Deposition

Dielectric Formation

Strained Germanium

Cu Filling

Metal Layer Integration

Electromagnetic Radiation

Tantalum Gate Electrode

Passivation Techniques

High Temperature Plasma

Substrate Processing

Wafer Surface Treatment

20 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 9607888 - Integration of ALD barrier layer and CVD Ru liner for void-free Cu filling (2017-03-28),

2. 8722548 - Structures and techniques for atomic layer deposition (2014-05-13),

3. 8580034 - Low-temperature dielectric formation for devices with strained germanium-containing channels (2013-11-12),

4. 8460945 - Method for monitoring status of system components (2013-06-11),

5. 8168548 - UV-assisted dielectric formation for devices with strained germanium-containing layers (2012-05-01),

6. 7674710 - Method of integrating metal-containing films into semiconductor devices (2010-03-09),

7. 7479454 - Method and processing system for monitoring status of system components (2009-01-20),

8. 7419702 - Method for processing a substrate (2008-09-02),

9. 7393761 - Method for fabricating a semiconductor device (2008-07-01),

10. 7300891 - Method and system for increasing tensile stress in a thin film using multi-frequency electromagnetic radiation (2007-11-27),

11. 7265066 - Method and system for increasing tensile stress in a thin film using collimated electromagnetic radiation (2007-09-04),

12. 7189431 - Method for forming a passivated metal layer (2007-03-13),

13. 7078341 - Method of depositing metal layers from metal-carbonyl precursors (2006-07-18),

14. 7067422 - Method of forming a tantalum-containing gate electrode structure (2006-06-27),

15. 6992011 - Method and apparatus for removing material from chamber and wafer surfaces by high temperature hydrogen-containing plasma (2006-01-31),

Title: The Innovator: Gert J Leusink - Pioneering New Frontiers in Semiconductor Technology

Introduction:

Gert J Leusink, a distinguished inventor based in Albany, NY, is at the forefront of revolutionary advancements in semiconductor technology. With an impressive portfolio of 20 patents, his contributions have significantly shaped the industry.

Latest Patents:

Among his latest patents is the groundbreaking "Integration of ALD barrier layer and CVD Ru liner for void-free Cu filling." This patent showcases innovative methods for the seamless integration of atomic layer deposition (ALD) barrier layers and chemical vapor deposition (CVD) Ru liners, enabling void-free copper filling in narrow recessed features for semiconductor devices. Another notable patent is the "Structures and Techniques for Atomic Layer Deposition," which demonstrates novel approaches to forming monolayers of materials on substrates through atomic layer deposition cycles.

Career Highlights:

With an illustrious career, Gert J Leusink has made significant contributions to leading companies in the field. He has lent his expertise to Tokyo Electron Limited and International Business Machines Corporation (IBM), where his innovative ideas have driven technological advancements and garnered recognition.

Collaborations:

Collaborating with skilled professionals such as Cory Wajda and Hideaki Yamasaki, Gert J Leusink has fostered a culture of innovation and excellence. Together, they have explored new avenues in semiconductor research, pushing boundaries and creating solutions that are shaping the future of the industry.

Conclusion:

In conclusion, Gert J Leusink stands as a visionary inventor who continues to push the boundaries of semiconductor technology. His inventive spirit, coupled with his collaborative efforts, has led to pioneering solutions that have redefined industry standards. Gert J Leusink's relentless pursuit of innovation sets a benchmark for aspiring inventors and underscores the critical role of creativity in driving technological progress.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]