Tokyo Electron Limited

International Business Machines Corporation

Gert J Leusink

Cory Wajda

Yumiko Kawano

Fenton Read McFeely

Hideaki Yamasaki

Sandra Guy Malhotra

Tatsuo Hatano

Atsushi Gomi

Tsukasa Matsuda

Kazuhito Nakamura

Vijay Narayanan

Paul Charles Jamison

Joseph T Hillman

David L O'Meara

John Jacob Yurkas

Masahito Sugiura

Michael S Ameen

Steven Consiglio

Igeta Masonobu

Daniel Craig Burdett

Stephen H Cabral

John William Kostenko

Hemanth Jagannathan

Andrew Herbert Simon

Robert Daniel Clark

Barry P Linder

Tadahiro Ishizaka

Jozef Brcka

Toshio Hasegawa

Kai-Hung Yu

Kaoru Maekawa

Mitsuhiro Tachibana

Genji Nakamura

Marinus Hopstaken

Tugrul Yasar

Emmanuel P Guidotti

Mikio Suzuki

Takenao Nemoto

Michael G Ward

Fumitaka Amano

Shigeo Ashigaki

Tomoyuki Sakoda

Manabu Oie

Enrico Mosca

Cory Waida

Koumei Matsuzava

Bill Jones

Jeffrey J Long

Bill Oliver

Charles Tweed

Shintaro Aoyama

Methods for integration of atomic layer deposition (ALD) of barrier layers and chemical vapor deposition (CVD) of Ru liners for Cu filling of narrow recessed features for semiconductor devices are disclosed in several embodiments. According to one embodiment, the method includes providing a substrate containing a recessed feature, depositing a conformal barrier layer by ALD in the recessed feature, where the barrier layer contains TaN or TaAlN, depositing a conformal Ru liner by CVD on the barrier layer, and filling the recessed feature with Cu metal.

Integration of ALD barrier layer and CVD Ru liner for void-free Cu filling

In one exemplary embodiment, a method includes: forming at least one first monolayer of first material on a surface of a substrate by performing a first plurality of cycles of atomic layer deposition; thereafter, annealing the formed at least one first monolayer of first material under a first inert atmosphere at a first temperature between about 650&#xb0; C. and about 900&#xb0; C.; thereafter, forming at least one second monolayer of second material by performing a second plurality of cycles of atomic layer deposition, where the formed at least one second monolayer of second material at least partially overlies the annealed at least one first monolayer of first material; and thereafter, annealing the formed at least one second monolayer of second material under a second inert atmosphere at a second temperature between about 650&#xb0; C. and about 900&#xb0; C.

Structures and techniques for atomic layer deposition

A method of forming a semiconductor device includes providing a substrate in a vacuum processing tool, the substrate having a strained Ge-containing layer on the substrate and a Si layer on the strained Ge-containing layer, maintaining the substrate at a temperature less than 700&#xb0; C., and generating a soft plasma in the vacuum processing tool. The Si layer is exposed to the soft plasma to form a Si-containing dielectric layer while minimizing oxidation and strain relaxation in the underlying strained Ge-containing layer. A semiconductor device containing a substrate, a strained Ge-containing layer on the substrate, and an Si-containing dielectric layer formed on the strained Ge-containing layer is provided. The semiconductor device can further contain a gate electrode layer on the Si-containing dielectric layer or a high-k layer on the Si-containing dielectric layer and a gate electrode layer on the high-k layer.

Low-temperature dielectric formation for devices with strained germanium-containing channels

A method and system are provided for monitoring status of a system component in a process chamber of a batch type processing system. The method includes exposing a system component to light from a light source and monitoring interaction of the light with the system component to determine status of the system component. The method can detect light transmission and/or light reflection from a system component during a process that can include a chamber cleaning process, a chamber conditioning process, a substrate etching process, and a substrate film formation process. The system component can be a consumable system part such as a process tube, a shield, a ring, a baffle, and a liner, and can further contain a protective coating.

Method for monitoring status of system components

A method of forming a semiconductor device includes providing a substrate in a vacuum processing tool, the substrate having a strained Ge-containing layer on the substrate and a Si-containing layer on the strained Ge-containing layer, maintaining the substrate at a temperature less than 700&#xb0; C., and exposing the Si-containing layer to oxidation radicals in an UV-assisted oxidation process to form a Si-containing dielectric layer while minimizing oxidation and strain relaxation in the underlying strained Ge-containing layer. A semiconductor device containing a substrate, a strained Ge-containing layer on the substrate, and a Si-containing dielectric layer formed on the strained Ge-containing layer is provided. The semiconductor device can further contain a gate electrode layer on the Si-containing dielectric layer or a high-k layer on the Si-containing dielectric layer and a gate electrode layer on the high-k layer.

UV-assisted dielectric formation for devices with strained germanium-containing layers

A method for integrating a metal-containing film in a semiconductor device, for example a gate stack. In one embodiment, the method includes providing a substrate in a process chamber, depositing the tungsten-containing film on the substrate at a first substrate temperature by exposing the substrate to a deposition gas containing a tungsten carbonyl precursor, heat treating the tungsten-containing film at a second substrate temperature greater than the first substrate temperature to remove carbon monoxide gas from the tungsten-containing film, and forming a barrier layer on the heat treated tungsten-containing film. Examples of tungsten-containing films include W, WN, WSi, and WC. Additional embodiments include depositing metal-containing films containing Ni, Mo, Co, Rh, Re, Cr, or Ru from the corresponding metal carbonyl precursors.

Method of integrating metal-containing films into semiconductor devices

A method and system for monitoring status of a system component during a process. The method includes exposing a system component to a reactant gas during a process, where the reactant gas is capable of etching the system component material to form an erosion product, and monitoring release of the erosion product during the process to determine status of the system component. Processes that can be monitored include a chamber cleaning process, a chamber conditioning process, a substrate etching process, and a substrate film formation process. The system component can be a consumable system part such as a process tube, a shield, a ring, a baffle, an injector, a substrate holder, a liner, a pedestal, a cap cover, an electrode, and a heater, any of which can further include a protective coating. The processing system includes the system component in a process chamber, a gas injection system for introducing the reactant gas, a chamber protection system for monitoring the status of the system component, and a controller for controlling the processing system in response to the status.

Method and processing system for monitoring status of system components

A method for processing a substrate on a ceramic substrate heater in a process chamber. The method includes forming a protective coating on the ceramic substrate heater in the process chamber and processing a substrate on the coated substrate heater. The processing can include providing a substrate to be processed on the coated ceramic substrate heater, performing a process on the substrate by exposing the substrate to a process gas, and removing the processed substrate from the process chamber.

Method for processing a substrate

A method for treating a gate stack in the fabrication of a semiconductor device by providing a substrate containing a gate stack having a dielectric layer formed on the substrate and a metal-containing gate electrode layer formed on the high-k dielectric layer, forming low-energy excited dopant species from a process gas in a plasma, and exposing the gate stack to the excited dopant species to incorporate a dopant into the gate stack. The method can be utilized to tune the workfunction of the gate stack.

Method for fabricating a semiconductor device

A method and system are described for increasing the tensile stress in thin films formed on a substrate, such as silicon nitride films. The thin film may be a planar film, or a non-planar film, such as a nitride film formed over a NMOS gate. The thin film is exposed to electro-magnetic (EM) radiation, such as EM radiation having a wavelength component less than about 500 nm. The EM source can include a multi-frequency source of radiation. Additionally, the source of radiation is collimated in order to selectively treat regions of a non-planar film.

Method and system for increasing tensile stress in a thin film using multi-frequency electromagnetic radiation

A method and system are described for increasing the tensile stress in thin films formed on a substrate, such as silicon nitride films. The thin film may be a planar film, or a non-planar film, such as a nitride film formed over a NMOS gate. The thin film is exposed to collimated electro-magnetic (EM) radiation to anisotropically expose the film. The EM radiation can have a component having a wavelength less than about 500 nm. The EM source can include a multi-frequency source of radiation.

Method and system for increasing tensile stress in a thin film using collimated electromagnetic radiation

A method for forming a passivated metal layer that preserves the properties and morphology of an underlying metal layer during subsequent exposure to oxygen-containing ambients. The method includes providing a substrate in a process chamber, exposing the substrate to a process gas containing a rhenium-carbonyl precursor to deposit a rhenium metal layer on the substrate in a chemical vapor deposition process, and forming a passivation layer on the rhenium metal layer to thereby inhibit oxygen-induced growth of rhenium-containing nodules on the rhenium metal surface.

Method for forming a passivated metal layer

A method for depositing metal layers on semiconductor substrates by a thermal chemical vapor deposition (TCVD) process. The TCVD process utilizes high flow rate of a dilute process gas containing a metal-carbonyl precursor to deposit a metal layer. In one embodiment of the invention, the metal-carbonyl precursor can be selected from at least one of W(CO), Ni(CO), Mo(CO), Co(CO), Rh(CO), Re(CO), Cr(CO), and Ru(CO). In another embodiment of the invention, a method is provided for depositing a W layer from a process gas comprising a W(CO)precursor at a substrate temperature of about 410&#xb0; C. and a chamber pressure of about 200 mTorr.

Method of depositing metal layers from metal-carbonyl precursors

A method for forming a tantalum-containing gate electrode structure by providing a substrate having a high-k dielectric layer thereon in a process chamber and forming a tantalum-containing layer on the high-k dielectric layer in a thermal chemical vapor deposition process by exposing the substrate to a process gas containing TAIMATA (Ta(N(CH))(NC(CH)(CH))) precursor gas. In one embodiment of the invention, the tantalum-containing layer can include a TaSiN layer formed from a process gas containing TAIMATA precursor gas, a silicon containing gas, and optionally a nitrogen-containing gas. In another embodiment of the invention, a TaN layer is formed on the TaSiN layer. The TaN layer can be formed from a process gas containing TAIMATA precursor gas and optionally a nitrogen-containing gas. A computer readable medium executable by a processor to cause a processing system to perform the method and a processing system for forming a tantalum-containing gate electrode structure are also provided.

Method of forming a tantalum-containing gate electrode structure

A cleaning method is provided using a cleaning gas mixture of hydrogen and inert gas, for example a mixture in which the hydrogen content is between 20 percent and 80 percent by volume, provided to the chamber of a semiconductor wafer processing apparatus and an ICP power source only to generate a high density plasma in the gas mixture without biasing the surface to be cleaned. In examples of the invention, Si and SiOcontaminants or CFx contaminants are cleaned from a silicon contact prior to subsequent metal deposition. In another example of the invention, silicon residue is cleaned from internal chamber surfaces before oxide etching to recover the baseline oxide etch rate.

Method and apparatus for removing material from chamber and wafer surfaces by high temperature hydrogen-containing plasma

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Albany, NY, United States of America

Gert J Leusink