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San Jose, CA, United States of America

Maxpower Semiconductor Inc.

USPTO Granted Patents = 89

% Expired Patents = 1.1

Trademarks = 6

Forward Citations = 558

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13 inventors (with patents filed for the assignee):

Mohamed N Darwish (80 out of 123 patents)

Jun Zeng (60 out of 96 patents)

Richard A Blanchard (30 out of 271 patents)

4. Amit Paul (11 out of 25 patents)

5. Shih-Tzung Su (11 out of 11 patents)

6. Hamza Yilmaz (8 out of 259 patents)

7. Kui Pu (7 out of 7 patents)

8. Shigenari Okada (1 out of 4 patents)

9. Masaki Nagata (1 out of 13 patents)

10. Wenfang Du (1 out of 1 patent)

11. Peter Su (1 out of 1 patent)

12. Richard A Blachard (1 out of 1 patent)

13. Mohammed N Darwish (1 out of 1 patent)

Core Competencies:

Trench Transistors

Power MOSFET

Vertical Power Devices

Embedded Dielectric Layers

Low-Voltage-Drop Shunt

Lateral Transistors

Schottky Structures

Doped Trenches

High Density Power Devices

Body Diode

Power Device Structures

89 patents: Sort by Forward Citations

1. 12284817 - Trench-gated heterostructure and double-heterostructure active devices (2025-04-21),

2. 12057482 - MOSFET with distributed doped P-shield zones under trenches (2024-08-06),

3. 11888047 - Lateral transistors and methods with low-voltage-drop shunt to body diode (2024-01-30),

4. 11316021 - High density power device with selectively shielded recessed field plate (2022-04-26),

5. 11289596 - Split gate power device and its method of fabrication (2022-03-29),

6. 10720511 - Trench transistors and methods with low-voltage-drop shunt to body diode (2020-07-21),

7. 10720510 - Lateral transistors and methods with low-voltage-drop shunt to body diode (2020-07-21),

8. 10593813 - Vertical rectifier with added intermediate region (2020-03-17),

9. 10529810 - Lateral semiconductor power devices (2020-01-07),

10. 10510863 - Power device having a polysilicon-filled trench with a tapered oxide thickness (2019-12-17),

11. 10396150 - Vertical power transistor die with etched beveled edges for increasing breakdown voltage (2019-08-27),

12. 10325980 - Power semiconductor devices, methods, and structures with embedded dielectric layers containing permanent charges (2019-06-18),

13. 10186573 - Lateral power MOSFET with non-horizontal RESURF structure (2019-01-22),

14. 10157983 - Vertical power MOS-gated device with high dopant concentration N-well below P-well and with floating P-islands (2018-12-18),

15. 10128353 - Trench transistors and methods with low-voltage-drop shunt to body diode (2018-11-13),

Company Overview

Maxpower Semiconductor Inc., based in San Jose, CA, specializes in the development and manufacturing of advanced power semiconductor devices. The company focuses on innovative technologies such as trench transistors, power MOSFETs, and vertical power devices, which are essential for efficient power management in various applications. Their expertise extends to embedded dielectric layers, low-voltage-drop shunts, lateral transistors, and Schottky structures, positioning them as a key player in the power electronics industry.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 20 2026

89 Patents

#124 in San Jose, CA

#976 in California

#4,196 in US

#8,620 in the World

San Jose, CA, United States of America

Maxpower Semiconductor Inc.

Forward Citations = 558

13 inventors:

Mohamed N Darwish (80 out of 123 patents)

Jun Zeng (60 out of 96 patents)

Richard A Blanchard (30 out of 271 patents)

4. Amit Paul (11 out of 25 patents)

5. Shih-Tzung Su (11 out of 11 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Maxpower Semiconductor Inc.. Retrieved from https://idiyas.com/company/maxpower-semiconductor

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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