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Singapore, Singapore

Invention and Collaboration Laboratory Pte. Ltd.

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USPTO Granted Patents = 56

EPO Patents = 1

Trademarks = 1

Forward Citations = 31

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15 inventors (with patents filed for the assignee):

Chao-Chun Lu (38 out of 54 patents)

Chao-chun Lu (17 out of 28 patents)

Li-Ping Huang (8 out of 26 patents)

4. Chun Shiah (7 out of 61 patents)

5. Bor-Doou Rong (4 out of 29 patents)

6. Ming-Hong Kuo (3 out of 14 patents)

7. Shih-Hsing Wang (2 out of 19 patents)

8. Weng-Dah Ken (2 out of 14 patents)

9. Chun-Nan Lu (2 out of 2 patents)

10. Wen-Hsien Tu (1 out of 11 patents)

11. Juang-Ying Chueh (1 out of 1 patent)

12. Li-Ping Huang (1 out of 1 patent)

13. Wen-Hsien Tu (1 out of 1 patent)

14. Chao-Chun Lu (1 out of 1 patent)

15. Feng-Wu Chen (1 out of 1 patent)

Core Competencies:

Semiconductor Memory Structure

Transistor Structure

Dynamic Memory

CMOS SRAM

Heat Removal

Low Leakage Current

Integrated Circuits

Memory Array Circuit

MOSFET Design

Sustainable DRAM

Miniaturized Transistor

Interconnection Structures

56 patents: Sort by Forward Citations

1. 12777709 - Memory device and manufacturing method thereof (2026-10-27),

2. 12764919 - Homogeneous/ heterogeneous integration system with high performance computing and high storage volume (2026-10-13),

3. 12721165 - Semiconductor circuit structure with direct die heat removal structure (2026-08-25),

4. 12720736 - Semiconductor memory structure (2026-08-25),

5. 12707968 - Heat removing layer surrounding a transistor (2026-08-11),

6. 12707668 - Planar MOSFET with light, regular and heavily doped regions (2026-08-11),

7. 12696494 - Method for forming transistor structure with a vertically grown source and drain (2026-07-28),

8. 12694926 - CMOS SRAM structure with bulk NMOS transistors and fully insulated PMOS transistors in one bulk wafer (2026-07-28),

9. 12685124 - Memory array circuit (2026-07-14),

10. 12672321 - Metal-oxide-semiconductor field-effect transistor structure with low leakage current and reserved gate length (2026-06-30),

11. 12660619 - Semiconductor device structure with efficient heat-removal structures across the chip and monolithic fabrication method therefor (2026-06-16),

12. 12633321 - Semiconductor device structure having a metal layer positioned under the semiconductor substrate (2026-05-19),

13. 12598765 - Transistor with low leakage currents and manufacturing method thereof (2026-04-07),

14. 12586630 - Memory array circuit (2026-03-24),

15. 12575084 - Memory structure having a buried word line (2026-03-10),

Company Overview

Invention and Collaboration Laboratory Pte. Ltd. is a Singapore-based company specializing in the development and innovation of semiconductor devices. The organization focuses on advanced semiconductor memory structures and transistor technologies, including dynamic memory and CMOS SRAM. Their expertise extends to critical areas such as heat removal, low leakage current, and integrated circuits, contributing to the evolution of memory array circuits. The lab's research aims to enhance performance and efficiency in the semiconductor industry.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 27 2026

56 Patents

#54 in Singapore

#54 in Singapore

#12,772 in the World

Singapore, Singapore

Invention and Collaboration Laboratory Pte. Ltd.

Forward Citations = 31

15 inventors:

Chao-Chun Lu (38 out of 54 patents)

Chao-chun Lu (17 out of 28 patents)

Li-Ping Huang (8 out of 26 patents)

4. Chun Shiah (7 out of 61 patents)

5. Bor-Doou Rong (4 out of 29 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Invention and Collaboration Laboratory Pte. Ltd.. Retrieved from https://idiyas.com/company/invention-and-collaboration-laboratory

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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