The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 2026

Filed:

Jun. 08, 2023
Applicant:

Invention and Collaboration Laboratory Pte. Ltd., Singapore, SG;

Inventor:

Chao-Chun Lu, Taipei City, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 62/10 (2025.01); H10D 30/60 (2025.01); H10D 62/17 (2025.01); H10D 64/27 (2025.01); H10D 84/01 (2026.01); H10D 84/03 (2025.01); H10D 84/85 (2025.01);
U.S. Cl.
CPC ...
H10D 62/102 (2025.01); H10D 30/601 (2025.01); H10D 62/371 (2025.01); H10D 64/514 (2025.01); H10D 64/518 (2025.01); H10D 84/85 (2025.01); H10D 84/0188 (2025.01); H10D 84/038 (2025.01);
Abstract

A metal-oxide-semiconductor field-effect transistor (MOSFET) structure includes a semiconductor substrate, a gate structure, a channel region, a trench, an isolation region, a first conductive region, and a P-N junction. The semiconductor substrate has a semiconductor surface. The gate structure is above the semiconductor surface. The channel region is under the gate structure. The trench is formed below the semiconductor surface and adjacent to the channel region. The isolation region is in the trench. The first conductive region has a first doping type, and the first conductive region is positioned on the isolating layer and electrically coupled to the channel region. The P-N junction extends upward from the isolation region and along an edge of the first conductive region.


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