For the Inventor, By the Inventor

Enter assignee name

Hsinchu, Taiwan

Etron Technology, Inc.

USPTO Granted Patents = 304

% Expired Patents = 26.0

Trademarks = 18

Forward Citations = 1,409

Loading Chart...

Loading Chart...

161 inventors (with patents filed for the assignee):

Chun Shiah (57 out of 61 patents)

Chao-Chun Lu (43 out of 54 patents)

Tah-Kang Joseph Ting (31 out of 41 patents)

4. Bor-Doou Rong (26 out of 29 patents)

5. Der-Min Yuan (26 out of 27 patents)

6. Yen-An Chang (15 out of 36 patents)

7. Chao-chun Lu (15 out of 27 patents)

8. Shih-Hsing Wang (14 out of 19 patents)

9. Ho-Yin Chen (14 out of 14 patents)

10. Gyh-Bin Wang (13 out of 26 patents)

11. Ming-Hong Kuo (12 out of 13 patents)

12. Ming-Hung Wang (11 out of 21 patents)

13. Shi-Huei Liu (10 out of 11 patents)

14. Jeng-Tzong Shih (10 out of 12 patents)

15. Hsien-Sheng Huang (9 out of 11 patents)

Core Competencies:

High Bandwidth Memory

Dynamic Memory

Transistor Structure

Error Correction

Memory Cell

3D IC

Sustainable DRAM

Miniaturized Transistor

Integrated Circuit

Memory Architecture

Low Leakage Current

Memory System

304 patents: Sort by Forward Citations

1. 12751308 - Semiconductor package and semiconductor package assembly with edge side interconnection (2026-09-29),

2. 12751289 - Semiconductor package and semiconductor package assembly with edge interconnection and method of forming the same (2026-09-29),

3. 12745675 - Memory module with reduced bonding wires (2026-09-22),

4. 12745405 - 3D IC structure (2026-09-22),

5. 12717732 - Memory system and memory chip (2026-08-25),

6. 12717517 - Memory controller for reducing a predetermined time interval inside a memory, and related memory system and memory (2026-08-25),

7. 12713625 - 3D IC STRUCTURE (2026-08-18),

8. 12706133 - Dynamic memory with long retention time (2026-08-11),

9. 12706124 - Semiconductor device structure (2026-08-11),

10. 12696803 - Die package including a semiconductor die having a cavity within which a passive component is positioned, IC package and manufacturing process thereof (2026-07-28),

11. 12694926 - CMOS SRAM structure with bulk NMOS transistors and fully insulated PMOS transistors in one bulk wafer (2026-07-28),

12. 12672321 - Metal-oxide-semiconductor field-effect transistor structure with low leakage current and reserved gate length (2026-06-30),

13. 12666629 - 3D IC structure (2026-06-23),

14. 12665045 - Memory device (2026-06-23),

15. 12633321 - Semiconductor device structure having a metal layer positioned under the semiconductor substrate (2026-05-19),

Company Overview

Etron Technology, Inc., based in Hsinchu, Taiwan, specializes in advanced memory technology solutions. The company focuses on developing high bandwidth memory and dynamic memory systems, incorporating innovative transistor structures and error correction techniques. Etron is dedicated to enhancing memory cell performance and exploring 3D IC technologies, while also prioritizing sustainable DRAM solutions and miniaturized transistor designs. Their expertise positions them as a key player in the evolving landscape of memory technology.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 20 2026

304 Patents

#31 in Hsinchu

#94 in Taiwan

#2,948 in the World

Hsinchu, Taiwan

Etron Technology, Inc.

Forward Citations = 1,409

161 inventors:

Chun Shiah (57 out of 61 patents)

Chao-Chun Lu (43 out of 54 patents)

Tah-Kang Joseph Ting (31 out of 41 patents)

4. Bor-Doou Rong (26 out of 29 patents)

5. Der-Min Yuan (26 out of 27 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Etron Technology, Inc.. Retrieved from https://idiyas.com/company/etron-technology

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

Loading…