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For the Inventor, By the Inventor

Santa Clara, CA, United States of America

Intel Ndtm US LLC


USPTO Granted Patents = 36


Forward Citations = 1

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93 inventors (with patents filed for the assignee):

goldMedal Aliasgar S Madraswala (10 out of 61 patents)

silverMedal Sagar Upadhyay (8 out of 15 patents)

bronzeMedal Shantanu R Rajwade (6 out of 35 patents)

4.  Narayanan Ramanan (6 out of 9 patents)

5.  Tarek Ahmed Ameen Beshari (4 out of 8 patents)

6.  Ali Khakifirooz (3 out of 758 patents)

7.  Deepak Thimmegowda (3 out of 30 patents)

8.  Chang Wan Ha (3 out of 63 patents)

9.  Guangyu Huang (3 out of 34 patents)

10.  Richard M Fastow (3 out of 91 patents)

11.  Matin Amani (3 out of 4 patents)

12.  Naveen Prabhu Vittal Prabhu (3 out of 6 patents)

13.  Krishna Kumar Parat (3 out of 126 patents)

14.  Pratyush Chandrapati (3 out of 3 patents)

15.  Bhaskar Venkataramaiah (3 out of 3 patents)


36 patents:

1. 12531110 - Synchronous independent plane read operation (2026-01-20),
2. 12520495 - 3D NAND with IO contacts in isolation trench (2026-01-06),
3. 12518833 - Method and apparatus to reduce time to program single level cell blocks in a non-volatile memory (2026-01-06),
4. 12512407 - Stitching to enable dense interconnect arrangements (2025-12-30),
5. 12500122 - Interdeck layers and pillar alignment (2025-12-16),
6. 12488819 - Dummy wordline contacts to improve etch margin of semi-isolated wordlines in staircase structures (2025-12-02),
7. 12488817 - Enhanced IO interface for plc program and program-suspend-resume operations (2025-12-02),
8. 12484225 - Metal hybrid charge storage structure for memory (2025-11-25),
9. 12468484 - Express status operation for storage devices with independent planes and plane groups (2025-11-11),
10. 12467974 - Diagnostic ring oscillator circuit for DC and transient characterization (2025-11-11),
11. 12461654 - Method of detecting read hotness and degree of randomness in solid-state drives (SSDS) (2025-11-04),
12. 12432922 - Method and apparatus to mitigate word line staircase etch stop layer thickness variations in 3D NAND devices (2025-09-30),
13. 12424483 - 3D NAND with inter-wordline airgap (2025-09-23),
14. 12394497 - Efficient bitline stabilization for program inhibit in NAND arrays (2025-08-19),
15. 12394492 - Memory cell sensing circuit with adjusted bias from pre-boost operation (2025-08-19),
Intel Ndtm US LLC is a leading provider of non-destructive testing solutions for a wide range of industries such as aerospace, automotive, and manufacturing. With a focus on innovation and quality, Intel Ndtm US LLC offers a comprehensive suite of services including ultrasonic testing, visual inspection, and radiography. Their team of experts is dedicated to providing accurate and reliable testing to ensure the safety and integrity of critical assets.
This text is generated by artificial intelligence and may not be accurate.

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USPTO Data Jan 1 1976 - Jan 20 2026

36 Patents

#126 in Santa Clara, CA

#2,181 in California

#9,205 in US

#18,213 in the World

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Santa Clara, CA, United States of America

Intel Ndtm US LLC

Forward Citations = 1

93 inventors:

goldMedal Aliasgar S Madraswala (10 out of 61 patents)

silverMedal Sagar Upadhyay (8 out of 15 patents)

bronzeMedal Shantanu R Rajwade (6 out of 35 patents)

4.  Narayanan Ramanan (6 out of 9 patents)

5.  Tarek Ahmed Ameen Beshari (4 out of 8 patents)

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