Folsom, CA, United States of America

Aliasgar S Madraswala

This inventor holds 64 USPTO granted patents and 16 published patent applications and 5 EPO patents, primarily in Non-Volatile Memory. Top assignees: Intel Corporation, Intel Ndtm US LLC, Micron Technology Incorporated. Active years: 2010-2026.

USPTO Granted Patents = 64 

% Patents Active = 95.3

 

Average Co-Inventor Count = 4.4

ph-index = 7

Forward Citations = 180(Granted Patents)

Forward Citations (Not Self Cited) = 140(Dec 10, 2025)


Company Filing History:


Years Active: 2010-2026

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Areas of Expertise:
NAND Flash
Memory Programming
Read Latency
Multi-Page Read
Solid State Drive
Program Operations
Dynamic Caching
Concurrent Operations
Thermal Management
Data Structure
Erase-Suspend
Signal Calibration
64 patents (USPTO):Explore Patents

Title: Innovations of Aliasgar S Madraswala in Memory Technology

Introduction: Aliasgar S Madraswala is a prominent inventor based in Folsom, California, known for his significant contributions to memory technology. With a remarkable achievement of 52 patents, he has played a pivotal role in advancing the capabilities of multi-level cell (MLC) memory systems.

Latest Patents: Among his latest innovations, two notable patents stand out. The first is a patent for "Dynamic Program Caching," which aims to reduce latency in program operations on MLC memory with at least three pages and multiple threshold voltage levels, such as Triple Level Cell (TLC) NAND. The technology allows a controller to initiate program operations without loading all pages, thereby improving efficiency. The NAND memory is equipped to load pages sequentially while executing parts of the operations in parallel, enhancing performance while monitoring data loading completion times.

The second patent, "Dynamic Gate Steps for Last-Level Programming to Improve Write Performance," details systems and methods that conduct a pulse-verify loop sequence from a first program level to a next-to-last program level in targeted NAND memory cells. This innovation involves issuing program pulses and verify pulses that differ by a specific gate step voltage amount, ultimately enhancing the write performance of memory cells.

Career Highlights: Aliasgar has had a remarkable career with esteemed companies, including Intel Corporation and Micron Technology Incorporated. His work has significantly shaped modern memory technology, ensuring faster and more reliable data processing in various applications.

Collaborations: Throughout his career, Aliasgar has collaborated with talented professionals in the field, including notable coworkers such as Yogesh B Wakchaure and Xin Guo. These collaborations have undoubtedly fostered an environment of innovation, leading to the development of groundbreaking technologies.

Conclusion: Aliasgar S Madraswala continues to be a driving force in memory technology innovations. His impressive patent portfolio reflects his commitment to enhancing the efficiency and performance of memory systems. With ongoing contributions to the field, he remains a key figure in the evolution of data storage solutions.

Profile summary based on public USPTO records.
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