The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 04, 2026
Filed:
Feb. 22, 2022
Applicant:
Intel Ndtm Us Llc, Santa Clara, CA (US);
Inventors:
Chang Wan Ha, San Ramon, CA (US);
Quincy S. Chiu, Portland, OR (US);
Hoon Koh, San Jose, CA (US);
Kristopher H. Gaewsky, El Dorado Hills, CA (US);
Aliasgar S. Madraswala, Folsom, CA (US);
Bharat M. Pathak, Folsom, CA (US);
Pranav Kalavade, San Jose, CA (US);
Akshay Jayaraj, Folsom, CA (US);
Simerjeet Singh, Galt, CA (US);
Zengtao Liu, Eagle, ID (US);
Assignee:
SK Hynix NAND Product Solutions Corp., Rancho Cordova, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0655 (2013.01); G06F 3/0604 (2013.01); G06F 3/0679 (2013.01);
Abstract
Manufacturing yield loss of NAND Flash dies is reduced by selecting a plane to store a read-only reserved block and another plane to store a backup read-only reserved block based on the Number of Valid Blocks (NVB) blocks in each plane in the NAND Flash array.