El Dorado Hills, CA, United States of America

Kristopher H Gaewsky

This inventor holds 18 USPTO granted patents and 4 published patent applications, primarily in Flash Memory Technology. Top assignees: Intel Corporation, Intel Ndtm US LLC, Micron Technology Incorporated. Active years: 2015-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kristopher H Gaewsky. Retrieved from https://idiyas.com/inventor/kristopher-h-gaewsky

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 18 

% Patents Active = 94.4

Average Co-Inventor Count = 3.7

ph-index = 3

Forward Citations = 34(Granted Patents)


Company Filing History:


Years Active: 2015-2026

Loading Chart...
Areas of Expertise:
NAND Flash
Non-Volatile Memory
Read Latency
Write Uniformity
Solid State Drive
Error Correction
Memory Block Access
Program Voltage
Erase Operation
Reliability Techniques
Cluster Failure Rates
18 patents (USPTO):Explore Patents

Title: Innovations of Kristopher H Gaewsky

Introduction

Kristopher H Gaewsky is a prominent inventor based in El Dorado Hills, CA. He holds a total of 17 patents, showcasing his significant contributions to the field of non-volatile memory technology. His work has been instrumental in enhancing the performance and reliability of NAND devices.

Latest Patents

One of his latest patents is focused on zero voltage program state detection for NAND devices. This innovation addresses the need for customers to quickly validate their components and SSD flows, thereby improving NAND retention and reliability after assembly and die-level rework. The detection operation involves reading a NAND page with reference voltages that define an acceptable range of voltage levels. If the threshold voltage levels of NAND memory cells exceed a predetermined failed bytes limit, the zero voltage program state is deemed invalid.

Another significant patent by Gaewsky is related to read latency reduction for partially-programmed blocks of non-volatile memory. This invention proactively adjusts read voltages at the system level before performing read operations on data located in partially-programmed blocks. By determining a wordline-specific pattern of offsets associated with past unsuccessful reads, read voltages can be adjusted to minimize read latency and improve overall efficiency.

Career Highlights

Throughout his career, Kristopher H Gaewsky has worked with leading technology companies, including Intel Corporation and Micron Technology Incorporated. His experience in these organizations has allowed him to develop cutting-edge technologies that have a lasting impact on the industry.

Collaborations

Gaewsky has collaborated with notable professionals in the field, including Aliasgar S Madraswala and Yogesh B Wakchaure. These collaborations have further enriched his work and contributed to the advancement of non-volatile memory technologies.

Conclusion

Kristopher H Gaewsky's innovative patents and career achievements highlight his significant role in the advancement of NAND technology. His contributions continue to influence the industry and improve the performance of non-volatile memory devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…