Narayanan Ramanan

Title: Innovations of Narayanan Ramanan

Introduction

Narayanan Ramanan is a prominent inventor based in San Jose, California. He has made significant contributions to the field of technology, particularly in memory cell sensing circuits and programming processes for flash memory chips. With a total of nine patents to his name, Ramanan's work showcases his expertise and innovative spirit.

Latest Patents

One of Ramanan's latest patents is titled "Memory cell sensing circuit with adjusted bias from pre-boost operation." This invention involves a sense circuit that performs a multistage boost, including a boost during precharge operation and a boost during the standard boost operation. The sense circuit features an output transistor that drives a sense output based on current through a sense node, which in turn drives the gate of the output transistor. Additionally, the sense circuit includes a precharge circuit to precharge the sense node and the gate of the output transistor, along with a boost circuit to enhance the sense node. The boost circuit can be boosted during precharge by a first boost voltage, resulting in a lower boost applied to the sense node after precharge. Furthermore, the boost circuit boosts the sense node by a second boost voltage that is lower than the first boost voltage, ultimately enhancing the sense node down by the full boost voltage of the first boost voltage plus the second boost voltage after sensing.

Another notable patent is the "Program verify process having placement aware pre-program verify (PPV)