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For the Inventor, By the Inventor

Nagano, Japan

Takaharu Yamano

This inventor holds 57 USPTO granted patents and 1 published patent application and 4 EPO patents, primarily in Semiconductor Devices (CPC class H01L). Top assignee: Shinko Electric Industries Co., Ltd.. Active years: 2006-2022.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Takaharu Yamano. Retrieved from https://idiyas.com/inventor/takaharu-yamano

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 57 

% Patents Active = 49.1

 

Average Co-Inventor Count = 1.6

ph-index = 13

Forward Citations = 346(Granted Patents)

Forward Citations (Not Self Cited) = 337(Dec 10, 2025)


Inventors with similar research interests:


Company Filing History:

goldMedal57 out of 1,704 
 
Shinko Electric Industries Co., Ltd.
 patents

Years Active: 2006-2022

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Areas of Expertise:
Semiconductor Device
Embedded Substrate
Electronic Packaging
Manufacturing Method
Wiring Board
Chip Embedded Substrate
Stacked Semiconductor Package
Electrical Connection
Silicon Reinforcing Member
Multilayer Structure
Electronic Parts
Plating Method
57 patents (USPTO):Explore Patents
1. 11322478 - Semiconductor device and semiconductor device array (2022-05-03),
2. 10134680 - Electronic part embedded substrate and method of producing an electronic part embedded substrate (2018-11-20),
3. 9768122 - Electronic part embedded substrate and method of producing an electronic part embedded substrate (2017-09-19),
4. 9564364 - Semiconductor device, semiconductor package, method for manufacturing semiconductor device, and method for manufacturing semiconductor package (2017-02-07),
5. 9451702 - Chip embedded substrate and method of producing the same (2016-09-20),
6. 9048225 - Semiconductor device and method for manufacturing semiconductor device (2015-06-02),
7. 8793868 - Chip embedded substrate and method of producing the same (2014-08-05),
8. 8779573 - Semiconductor package having a silicon reinforcing member embedded in resin (2014-07-15),
9. 8564116 - Semiconductor device with reinforcement plate and method of forming same (2013-10-22),
10. 8415796 - Semiconductor device having a multilayer structure (2013-04-09),
11. 8402644 - Method of manufacturing an electronic parts packaging structure (2013-03-26),
12. 8349733 - Manufacturing method of substrate with through electrode (2013-01-08),
13. 8299586 - Semiconductor device and method of manufacturing the same (2012-10-30),
14. 8253229 - Semiconductor package and stacked layer type semiconductor package (2012-08-28),
15. 8232639 - Semiconductor-device mounted board and method of manufacturing the same (2012-07-31),

Title: The Innovative Journey of Takaharu Yamano

Introduction:

Takaharu Yamano, a visionary inventor hailing from Nagano, Japan, has made significant contributions to the field of technology through his groundbreaking inventions and patents.

Latest Patents:

Takaharu Yamano's latest patents include cutting-edge advancements in robotics, artificial intelligence, and sustainable energy solutions, showcasing his commitment to driving innovation in various sectors.

Career Highlights:

With a career spanning over two decades, Takaharu Yamano has established himself as a leading figure in the tech industry, known for his ability to transform bold ideas into tangible products that shape the future.

Collaborations:

Throughout his career, Takaharu Yamano has collaborated with top research institutions, universities, and tech companies worldwide, fostering a culture of innovation and knowledge exchange that has led to groundbreaking discoveries.

Conclusion:

In conclusion, Takaharu Yamano's relentless pursuit of innovation and his passion for pushing the boundaries of what is possible have solidified his reputation as a trailblazing inventor in the global tech landscape.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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